IP Library Granted Patent US 10,741,717
Granted Patent B1
US 10,741,717 · App. 16/356,850 · Granted Aug 11, 2020

Self-alignment process for micro light emitting diode using back-side exposure

Inventors: Celine Claire Oyer (Cork, IE); David Massoubre (Cork, IE); Tilman Zehender (Cork, IE)
Assignee: Facebook Technologies, LLC
H01L33/007H01L33/40H01L33/44H01L33/32H01L2933/0016H01L2933/0025
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Quick Facts
Patent No.
US 10,741,717
App. No.
16/356,850
Granted
Aug 11, 2020
Kind
B1
Abstract

Embodiments relate to a micro light-emitting-diode (μLED) fabricated using a self-aligned process. To fabricate the μLED, a metal layer is deposited on a p-type semiconductor. The p-type semiconductor is on an n-type semiconductor and the n-type semiconductor is on a top side of a substrate. The metal layer is patterned to define a p-metal. The p-type semiconductor is etched using the p-metal as an etch mask. Similarly, the n-type semiconductor is etched using the p-metal and the p-type semiconductor as an etch mask. A negative photoresist layer is deposited over the patterned p-metal and the p-type semiconductor. The negative photoresist is then exposed from the back side of the substrate, thus exposing the regions of the negative photoresist that are not masked by the p-metal. The negative photoresist is then developed to expose the p-metal.

Claims (54)

1. A method of fabricating a light emitting diode (LED) device, comprising:

depositing a metal layer on a p-type semiconductor, the p-type semiconductor disposed on an n-type semiconductor, the n-type semiconductor disposed on a top side of a substrate;

patterning the metal layer to define a p-metal;

etching the p-type semiconductor, the etching of the p-type semiconductor aligned to the patterned p-metal;

depositing a negative photoresist layer, the negative photoresist layer over the patterned p-metal and the p-type semiconductor;

exposing the negative photoresist from a back side of the substrate at an opposite side of the top side of the substrate; and

developing the negative photoresist to expose the p-metal.

2. The method of claim 1 , wherein the exposure of portions of the negative photoresist is masked by the p-metal underneath the negative photoresist.

3. The method of claim 1 , further comprising:

depositing a bond metal over the developed negative photoresist, wherein the bond metal is in contact the exposed p-metal.

4. The method of claim 1 , wherein the developed negative photoresist is dielectric material.

5. The method of claim 1 , further comprising:

wet etching a side surface of the p-metal to form an undercut.

6. The method of claim 1 , wherein patterning the metal layer comprises:

depositing a layer of photoresist over the metal layer;

patterning the layer of photoresist; and

etching the metal layer based on the patterned layer of photoresist.

7. The method of claim 1 , wherein an active layer is disposed between the p-type semiconductor and the n-type semiconductor, and wherein the method further comprises:

etching the active layer and the n-type semiconductor, the etching of the active layer and the n-type semiconductor in alignment with the patterned p-metal.

8. The method of claim 7 , wherein the active layer and at least a portion of the n-type semiconductor are etched in alignment with the patterned p-metal.

9. The method of claim 1 , further comprising:

depositing a dielectric layer over the etched p-type semiconductor and the p-metal,

forming an opening of the dielectric layer on the p-metal,

wherein the negative photoresist is deposited over the dielectric layer, and

wherein the dielectric layer is etched in alignment with the developed negative photoresist.

10. The method of claim 9 , wherein the dielectric layer comprises an oxide or nitride.

11. The method of claim 9 , wherein the dielectric layer is disposed at least on a side of the etched p-type semiconductor.

12. A light-emitting-diode (LED) fabricated by a process comprising the steps of:

depositing a metal layer on a p-type semiconductor, the p-type semiconductor disposed on an n-type semiconductor, the n-type semiconductor disposed on a top side of a substrate;

patterning the metal layer to define a p-metal;

etching the p-type semiconductor, the etching of the p-type semiconductor in alignment with the patterned p-metal;

depositing a negative photoresist layer, the negative photoresist layer over the patterned p-metal and the p-type semiconductor;

exposing the negative photoresist from a back side of the substrate at an opposite side of the top side of the substrate; and

developing the negative photoresist to expose the p-metal.

13. The LED of claim 12 , wherein the exposure of portions of the negative photoresist is masked by the p-metal underneath the negative photoresist.

14. The LED of claim 12 , further fabricated by a process comprising the steps of:

depositing a bond metal over the developed negative photoresist, wherein the bond metal is in contact the exposed p-metal.

15. The LED of claim 12 , wherein the developed negative photoresist is dielectric material.

16. The LED of claim 12 , further fabricated by a process comprising the steps of:

wet etching a side surface of the p-metal to form an undercut.

17. The LED of claim 12 , wherein patterning the metal layer comprises:

depositing a layer of photoresist over the metal layer;

patterning the layer of photoresist; and

etching the metal layer based on the patterned layer of photoresist.

18. The LED of claim 12 , wherein a thickness of the metal layer is greater than a thickness of the negative photoresist.

19. The LED of claim 12 , wherein an active layer is disposed between the p-type semiconductor and the n-type semiconductor, and wherein the method further comprises:

etching the active layer and the n-type semiconductor, the etching of the active layer and the n-type semiconductor in alignment with the patterned p-metal.

20. A non-transitory computer readable storage medium configured to store instructions, the instructions, when executed by a fabrication tool, cause the fabrication tool to:

deposit a metal layer on a p-type semiconductor, the p-type semiconductor disposed on an n-type semiconductor, the n-type semiconductor disposed on a top side of a substrate;

pattern the metal layer to define a p-metal;

etch the p-type semiconductor, the etching of the p-type semiconductor in alignment with the patterned p-metal;

deposit a negative photoresist layer, the negative photoresist layer over the patterned p-metal and the p-type semiconductor;

expose the negative photoresist from a back side of the substrate at an opposite side of the top side of the substrate; and

develop the negative photoresist to expose the p-metal.

Assignments (2)
CHANGE OF NAME Recorded Jun 8, 2022
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 060315/0224 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2019
From: OYER, CELINE CLAIRE; MASSOUBRE, DAVID; ZEHENDER, TILMAN
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 048644/0235 →
Continuity (1)
Provisional Application 62651048 · Mar 30, 2018