IP Library Granted Patent US 10,956,170
Granted Patent B2
US 10,956,170 · App. 16/361,424 · Granted Mar 23, 2021

BIOS setting modification system

Inventors: Sundar Dasar (Round Rock, TX); Mark W. Shutt (Austin, TX); Swamy Kadaba Chaluvaiah (Round Rock, TX)
Assignee: Dell Products L.P.
G06F9/4401G06F3/0658
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Quick Facts
Patent No.
US 10,956,170
App. No.
16/361,424
Granted
Mar 23, 2021
Kind
B2
Abstract

A BIOS setting modification system is provided in a computing device. During a computing device runtime for the computing device, an Out-Of-Band (OOB) controller device receives a first BIOS setting modification request and, in response, generates first BIOS setting modification information and causes the transmission of a System Management Interrupt (SMI). During the computing device runtime for the computing device, an SMI handler subsystem in the computing device retrieves, in response to the SMI, the first BIOS setting modification information, either directly from the OOB controller device, or from a storage subsystem in which it was provided by the OOB controller device. The SMI handler subsystem then applies the first BIOS setting modification information to at least one subsystem in the computing device such that a first BIOS setting modification provided by the first BIOS setting modification information takes effect during the computing device runtime for the computing device.

Claims (62)

1. A Basic Input Output System (BIOS) setting modification system, comprising:

a computing device;

an Out-Of-Band (OOB) controller device is configured, during a computing device runtime for the computing device, to:

receive a first BIOS setting modification request that identifies a first BIOS setting that is capable of being modified during the computing device runtime for the computing device, wherein the first BIOS setting that is capable of being modified during the computing device runtime for the computing device includes at least one of a memory setting for a memory subsystem, a Network Interface Controller (NIC) setting for a NIC subsystem, a storage setting for a storage subsystem, or a password setting that sets a password;

generate, in response to receiving the first BIOS setting modification request, first BIOS setting modification information; and

cause, in response to receiving the first BIOS setting modification request that identifies the first BIOS setting that is capable of being modified during the computing device runtime for the computing device, transmission of a System Management Interrupt (SMI); and

an SMI handler subsystem that is included in the computing device, coupled to the OOB controller device, and configured, during the computing device runtime for the computing device, to:

retrieve, in response to the SMI, the first BIOS setting modification information; and

apply the first BIOS setting modification information to at least one subsystem in the computing device such that a first BIOS setting modification provided by the first BIOS setting modification information takes effect during the computing device runtime for the computing device.

2. The system of claim 1 , wherein the SMI handler subsystem is configured to:

retrieve the first BIOS setting modification information directly from the OOB controller device.

3. The system of claim 1 , further comprising:

a storage subsystem that is coupled to the OOB controller device and the SMI handler subsystem, wherein the OOB controller device is configured to:

provide the first BIOS setting modification information in the storage subsystem, and wherein the SMI handler subsystem is configured to:

retrieve the first BIOS setting modification information from the storage subsystem.

4. The system of claim 1 , wherein the first BIOS setting modification information is provided by a route configuration string.

5. The system of claim 1 , wherein the OOB controller device is configured to:

receive a second BIOS setting modification request;

generate, in response to receiving the second BIOS setting modification request, second BIOS setting modification information;

determine that the second BIOS setting modification request identifies a second BIOS setting that is not capable of being modified during the computing device runtime for the computing device;

store, in response to determining that the second BIOS setting modification request identifies the second BIOS setting that is not capable of being modified during the computing device runtime for the computing device, the second BIOS setting modification request; and

provide, following a reboot of the computing device, the second BIOS setting modification request for modifying the second BIOS setting.

6. An Information Handling System (IHS), comprising:

a first processing system;

a first memory system that is coupled to the first processing system and that includes instructions that, when executed by the first processing system, cause the first processing system to provide an Out-Of-Band (OOB) controller that is configured, during an IHS runtime for the IHS, to:

receive a first Basic Input Output System (BIOS) setting modification request that identifies a first BIOS setting that is capable of being modified during the IHS runtime for the IHS, wherein the first BIOS setting that is capable of being modified during the IHS runtime for the IHS includes at least one of a memory setting for a memory subsystem, a Network Interface Controller (NIC) setting for a NIC system, a storage setting for a storage system, or a password setting that sets a password;

generate, in response to receiving the first BIOS setting modification request, first BIOS setting modification information; and

cause, in response to receiving the first BIOS setting modification request that identifies the first BIOS setting that is capable of being modified during the IHS runtime for the IHS, transmission of a System Management Interrupt (SMI);

a second processing system; and

a second memory system that is coupled to the second processing system and that includes instructions that, when executed by the second processing system, cause the second processing system to provide an SMI handler that is configured, during the IHS runtime for the IHS, to:

retrieve, in response to the SMI, the first BIOS setting modification information that was generated by the OOB controller; and

apply the first BIOS setting modification information to at least one subsystem in the IHS such that a first BIOS setting modification provided by the first BIOS setting modification information takes effect during the IHS runtime for the IHS.

7. The IHS of claim 6 , wherein the SMI handler is configured to:

retrieve the first BIOS setting modification information directly from the OOB controller.

8. The IHS of claim 6 , wherein the SMI handler is configured to:

retrieve the first BIOS setting modification information from a storage subsystem, wherein the first BIOS setting modification information was provided in the storage subsystem by the OOB controller.

9. The IHS of claim 8 , wherein the storage subsystem is provided by a Serial Peripheral Interface (SPI) memory subsystem.

10. The IHS of claim 6 , wherein the first BIOS setting modification information is provided by a route configuration string.

11. The IHS of claim 6 , wherein the OOB controller is configured, during the IHS runtime for the IHS, to:

receive a second BIOS setting modification request;

generate, in response to receiving the second BIOS setting modification request, second BIOS setting modification information;

determine that the second BIOS setting modification request identifies a second BIOS setting that is not capable of being modified during the IHS runtime for the IHS;

store, in response to determining that the second BIOS setting modification request identifies the second BIOS setting that is not capable of being modified during the IHS runtime for the IHS, the second BIOS setting modification request; and

provide, following a reboot of the IHS, the second BIOS setting modification request for modifying the second BIOS setting.

12. A method for modifying Basic Input Output System (BIOS) settings during a computing device runtime for a computing device, comprising:

receiving, by an Out-Of-Band (OOB) controller device during the computing device runtime, a first Basic Input Output System (BIOS) setting modification request that identifies a first BIOS setting that is capable of being modified during the computing device runtime, wherein the first BIOS setting that is capable of being modified during the computing device runtime includes at least one of a memory setting for a memory subsystem, a Network Interface Controller (NIC) setting for a NIC subsystem, a storage setting for a storage subsystem, or a password setting that sets a password;

generating, by the OOB controller device during the computing device runtime and in response to receiving the first BIOS setting modification request, first BIOS setting modification information;

causing, by the OOB controller device during the computing device runtime and in response to receiving the first BIOS setting modification request that identifies the first BIOS setting that is capable of being modified during the computing device runtime, transmission of a System Management Interrupt (SMI);

retrieving, by an SMI hander subsystem during the computing device runtime and in response to the SMI, the first BIOS setting modification information that was generated by the OOB controller device; and

applying, by the SMI handler subsystem during the computing device runtime, the first BIOS setting modification information to at least one subsystem in the computing device such that a first BIOS setting modification provided by the first BIOS setting modification information takes effect during the computing device runtime.

13. The method of claim 12 , further comprising:

retrieving, by the SMI handler subsystem, the first BIOS setting modification information directly from the OOB controller device.

14. The method of claim 12 , further comprising:

retrieving, by the SMI handler subsystem, the first BIOS setting modification information from a storage subsystem, wherein the first BIOS setting modification information was provided in the storage subsystem by the OOB controller device.

15. The method of claim 14 , wherein the storage subsystem is provided by a Serial Peripheral Interface (SPI) memory subsystem.

16. The method of claim 12 , wherein the first BIOS setting modification information is provided by a route configuration string.

17. The method of claim 12 , further comprising:

receiving, by the OOB controller device during the computing device runtime, a second BIOS setting modification request;

generating, by the OOB controller device during the computing device runtime and in response to receiving the second BIOS setting modification request, second BIOS setting modification information;

determining, by the OOB controller device during the computing device runtime, that the second BIOS setting modification request identifies a second BIOS setting that is not capable of being modified during the computing device runtime;

storing, by the OOB controller device during the computing device runtime and in response to determining that the second BIOS setting modification request identifies the second BIOS setting that is not capable of being modified during the computing device runtime, the second BIOS setting modification request; and

providing, by the OOB controller device following a reboot of the computing device, the second BIOS setting modification request for modifying the second BIOS setting.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (050724/0466) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO WYSE TECHNOLOGY L.L.C.)
Reel/Frame 060753/0486 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053311/0169) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0742 →
RELEASE OF SECURITY INTEREST AT REEL 050405 FRAME 0534 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
Reel/Frame 058001/0001 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 053311/0169 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 15, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 050724/0466 →
SECURITY AGREEMENT Recorded Sep 17, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC; WYSE TECHNOLOGY L.L.C.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 050405/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2019
From: DASAR, SUNDAR; SHUTT, MARK W.; CHALUVAIAH, SWAMY KADABA
To: DELL PRODUCTS L.P.
Reel/Frame 048669/0295 →
Continuity (1)
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