Method of determining potential anomaly of memory device

1. A method of determining a potential anomaly of a memory device, the memory device being a hard disk drive (HDD) for processing a plurality of I/O operations, the method executable at a supervisory entity computer, the supervisory entity computer being communicatively coupled to the memory device, the method comprising:

over a pre-determined period of time:

determining a subset of input/output (I/O) operations having been sent to the memory device for processing;

applying at least one counter to determine an actual activity time of the memory device during the pre-determined period of time, the actual activity time being an approximation value representative of time the memory device took to process at least a portion of the subset of I/O operations;

applying a pre-determined model to generate an estimate of a benchmark processing time for each one of the subset of I/O operations, the applying the pre-determined model comprising:

based on a size of the sequential one of the subset of I/O operations and a pre-determined speed of execution of a type of the sequential one of the subset of I/O operations, determining an execution time for the sequential one of the subset of I/O operations;

determining if execution of the sequential one of the subset of I/O operations requires a full-cycle re-positioning of a writing head of the memory device from a position where a previous one of the subset of I/O operations terminated being recorded; and

if full-cycle re-positioning is required, adding to the execution time a pre-determined full-cycle re-positioning time to derive the benchmark processing time;

calculating a benchmark processing time for the subset of I/O operations;

generating a performance parameter based on the actual activity time and the benchmark processing time; and

based on an analysis of the performance parameter, determining if the potential anomaly is present in the memory device.

2. The method of claim 1 , wherein the pre-determined speed of execution and the pre-determined full-cycle re-positioning time have been pre-determined specifically for one of:

the memory device;

for a type of devices including the memory device.

3. The method of claim 1 , the method further comprising building the pre-determined model, the building the pre-determined model for one of:

the memory device;

a type of devices including the memory device.

4. The method of claim 3 , wherein the building the pre-determined model comprises:

determining, for the benchmark memory device, a speed of execution of a plurality of benchmarking I/O operations, the plurality of benchmarking I/O operations including a type associated with the subset of I/O operations having been sent to the memory device, the speed of execution being determined at least at: (i) an outer track and (ii) an inner track of the benchmark memory device;

determining a speed of rotation of a disk of the benchmark memory device;

determining a minimum delay required between ceasing executing of one of the plurality of benchmarking I/O operations and starting executing a subsequent one of the plurality of benchmarking I/O operations to enable the benchmark memory device to execute the subsequent one of the plurality of benchmarking I/O operations without requiring a full-cycle re-positioning of a hard disk of the benchmark memory device.

5. The method of claim 4 , wherein the building the pre-determined model is executed by sending to the benchmark memory device a pre-determined number the benchmarking I/O operations before putting the benchmark memory device into use.

6. The method of claim 5 , wherein the building the pre-determined model further comprises taking into account manufacturer-provided performance characteristics of the benchmark memory device.

7. The method of claim 1 , wherein the at least one counter comprises:

a first counter for counting a number of I/O operations sent to the memory device;

a second counter for counting a number of I/O operation-complete confirmations received from the memory device.

8. The method of claim 7 , wherein the determining the actual activity time comprises:

determining a total idle time by adding up all time intervals when a value of the first counter and a value of the second counter are the same; and

subtracting the total idle time from the pre-determined period of time.

9. The method of claim 1 , the method further comprises executing the analysis of the performance parameter.

10. The method of claim 9 , wherein:

the analysis comprises comparing the performance parameter to a threshold value of 1 and,

responsive to the performance parameter being above 1, determining the potential anomaly.

11. The method of claim 9 , wherein the memory device is one of a plurality of memory devices and wherein the analysis comprises determining a subset of memory devices that have:

an average performance parameter over a second pre-determined time interval being above other average performance parameter of other ones of the plurality of memory devices; and

a maximum performance parameter over the second pre-determined time interval being above other maximum performance parameter of other ones of the plurality of memory devices.

12. The method of claim 9 , wherein the performance parameter is a ratio.

13. The method of claim 12 , wherein:

the analysis comprises comparing the performance parameter to a threshold value; and

responsive to the performance parameter being above the threshold value, determining the potential anomaly.

14. The method of claim 13 , wherein the threshold value is 1.

15. The method of claim 9 , wherein:

the analysis comprises comparing the performance parameter to a threshold value; and

responsive to the performance parameter being below the threshold value, determining the potential anomaly as being present in a form of an over-performance of the memory device.

16. The method of claim 15 , wherein the threshold value is 1.

17. The method of claim 1 , wherein the at least one counter comprises a single counter that generates an indication of an actual processing time of the at least a portion of the subset of I/O operations.

18. A method of determining a potential anomaly of each one of a plurality of memory devices, at least one device of the plurality of memory devices being an SSD for processing a plurality of I/O operations, the SSD having at least one of a model number and a part number, the method executable at a supervisory entity computer, the supervisory entity computer being communicatively coupled to the plurality of memory devices, the method comprising:

over a pre-determined period of time:

determining a subset of input/output (I/O) operations having been sent to the each one of the plurality of memory devices for processing;

applying at least one counter to determine an actual activity time of the each one of the plurality of memory devices during the pre-determined period of time, the actual activity time being an approximation value representative of time the each one of the plurality of memory devices took to process at least a portion of the subset of I/O operations, the at least one counter including a first counter for monitoring I/O operations sent to the SSD for processing, a second counter for monitoring confirmations of completed I/O operations received from the SSD, and applying the at least one counter including:

executing the first counter to monitor I/O operations sent to the SSD for processing during the pre-determined period of time,

executing the second counter to monitor confirmations of completed I/O operations received from the SSD during the pre-determined period of time, and

determining a total of all time periods within the pre-determined period of time during which a value of the first counter was equal to a value of the second counter;

applying a pre-determined model to generate an estimate of a benchmark processing time for each one of the subset of I/O operations;

calculating a benchmark processing time for the subset of I/O operations;

generating a performance parameter for each one of the plurality of memory devices based on:

(i) the actual activity time and the benchmark processing time;

(ii) an SSD minimum delay pre-determined for a benchmark SSD, the benchmark SSD having the at least one of the model number and the part number as the SSD; and

based on an analysis of the performance parameter, determining if the potential anomaly is present in the each one of the plurality of memory devices.

19. The method of claim 18 , wherein applying the at least one counter to determine the actual activity time of the SSD during the pre-determined period of time further includes subtracting from the pre-determined period of time the total of all time periods during which the value of the first counter was equal to the value of the second counter.

20. The method of claim 19 , wherein the pre-determined model is further based on an SSD minimum delay pre-determined for the benchmark SSD.

21. The method of claim 20 , wherein the pre-determined model is based on empirical testing of the benchmark SSD.

22. The method of claim 21 , wherein the empirical testing includes sending a pre-determined number of benchmarking I/O operations to the benchmark SSD.

23. The method of claim 22 , wherein the method further comprises generating the pre-determined model, the generating including: clearing an entirety of the benchmark SSD prior to the empirical testing of the benchmark SSD.

24. The method of claim 18 , further comprising building the pre-determined model before the SSD is put into use.

25. The method of claim 24 , wherein the building the pre-determined model comprises taking into account manufacturer-provided performance characteristics of the benchmark SSD.

26. The method of claim 18 , further comprising executing the analysis of the performance parameter.

27. The method of claim 26 , wherein:

the analysis comprises comparing the performance parameter to a threshold value; and

responsive to the performance parameter being above the threshold value, determining the potential anomaly as being present in a form of a potential malfunction of the SSD.

28. The method of claim 18 , wherein the SSD is one of a plurality of memory devices and wherein the analysis comprises determining a subset of the memory devices that have:

an average performance parameter over a second pre-determined time interval being above other average performance parameter of other ones of the plurality of memory devices; and

a maximum performance parameter over the second pre-determined time interval being above other maximum performance parameter of other ones of the plurality of memory devices.

29. The method of claim 18 , wherein:

the analysis comprises comparing the performance parameter to a threshold value; and

responsive to the performance parameter being below the threshold value, determining the potential anomaly as being present in a form of an over-performance of the SSD.

30. The method of claim 18 , wherein the applying the pre-determined model comprises, for a given one of the subset of I/O operations:

based on a size of the given one of the subset of I/O operations and a pre-determined speed of execution of the given one of the subset of I/O operations, determining an execution time of the given one of the subset of I/O operations; and

determining a total execution time for the subset of I/O operations based on the execution time of each given one of the subset of I/O operations.

31. A method of detecting a potential anomaly in in-use performance of a memory device, the memory device being a hard disk drive (HDD), the method executable at a supervisory entity computer, the supervisory entity computer being communicatively coupled to the memory device, the method comprising:

over a pre-determined period of time:

determining a subset of input/output (I/O) operations having been sent to the memory device for processing;

applying at least one counter to determine an actual activity time of the memory device during the pre-determined period of time, the actual activity time being representative of time the memory device took to process at least some of the subset of I/O operations;

applying a pre-determined model to generate a benchmark processing time for the at least some of the subset of I/O operations, the applying the pre-determined model comprising:

based on a size of the sequential one of the subset of I/O operations and a pre-determined speed of execution of a type of the sequential one of the subset of I/O operations, determining an execution time for the sequential one of the subset of I/O operations;

determining if execution of the sequential one of the subset of I/O operations requires a full-cycle re-positioning of a writing head of the memory device from a position where a previous one of the subset of I/O operations terminated being recorded; and

if full-cycle re-positioning is required, adding to the execution time a pre-determined full-cycle re-positioning time to derive the benchmark processing time;

calculating a benchmark processing time for the at least some of the subset of I/O operations;

generating a performance parameter based on the actual activity time and the benchmark processing time;

based on an analysis of the performance parameter, determining if the potential anomaly in the in-use performance of the memory device is present with respect to the memory device.

32. A computer-implemented system for detecting a potential anomaly in a memory device, the system comprising a supervisory entity computer, the supervisory entity computer being communicatively coupled to the memory device, the memory device being a hard disk drive (HDD) for processing a plurality of I/O operations, the supervisory entity computer having a processor and a non-transient memory communicatively coupled to the processor, the non-transient memory storing instructions thereon which when executed by the processor cause the supervisory entity computer to, over a pre-determined period of time:

determine a subset of input/output (I/O) operations having been sent to the memory device for processing;

apply at least one counter to determine an actual activity time of the memory device during the pre-determined period of time, the actual activity time being an approximation value representative of time the memory device took to process at least a portion of the subset of I/O operations;

apply a pre-determined model to generate an estimate of a benchmark processing time for each one of the subset of I/O operations, the applying the pre-determined model comprising:

based on a size of the sequential one of the subset of I/O operations and a pre-determined speed of execution of a type of the sequential one of the subset of I/O operations, determining an execution time for the sequential one of the subset of I/O operations;

determining if execution of the sequential one of the subset of I/O operations requires a full-cycle re-positioning of a writing head of the memory device from a position where a previous one of the subset of I/O operations terminated being recorded; and

if full-cycle re-positioning is required, adding to the execution time a pre-determined full-cycle re-positioning time to derive the benchmark processing time;

calculate a benchmark processing time for the subset of I/O operations;

generate a performance parameter based on the actual activity time and the benchmark processing time; and

based on an analysis of the performance parameter, determine if the potential anomaly is present in the memory device.

33. A computer-implemented system for detecting a potential anomaly in each one of a plurality of memory devices, the system comprising a supervisory entity computer, the supervisory entity computer being communicatively coupled to the plurality of memory devices, at least one device of the plurality of memory devices being an SSD for processing a plurality of I/O operations, the SSD having at least one of a model number and a part number, the supervisory entity computer having a processor and a non-transient memory communicatively coupled to the processor, the non-transient memory storing instructions thereon which when executed by the processor cause the supervisory entity computer to, over a pre-determined period of time:

determine a subset of input/output (I/O) operations having been sent to the each one of the plurality of memory devices for processing;

apply at least one counter to determine an actual activity time of the each one of the plurality of memory devices during the pre-determined period of time, the actual activity time being an approximation value representative of time the each one of the plurality of memory devices took to process at least a portion of the subset of I/O operations, the at least one counter including a first counter for monitoring I/O operations sent to the SSD for processing, a second counter for monitoring confirmations of completed I/O operations received from the SSD, and in applying the at least one counter, the processor being configured to:

executing the first counter to monitor I/O operations sent to the SSD for processing during the pre-determined period of time,

executing the second counter to monitor confirmations of completed I/O operations received from the SSD during the pre-determined period of time, and

determining a total of all time periods within the pre-determined period of time during which a value of the first counter was equal to a value of the second counter;

apply a pre-determined model to generate an estimate of a benchmark processing time for each one of the subset of I/O operations;

calculate a benchmark processing time for the subset of I/O operations;

generate a performance parameter for each one of the plurality of memory devices based on:

(i) the actual activity time and the benchmark processing time;

(ii) an SSD minimum delay pre-determined for a benchmark SSD, the benchmark SSD having the at least one of the model number and the part number as the SSD; and

based on an analysis of the performance parameter, determine if the potential anomaly is present in the each one of the plurality of memory devices.