IP Library Patent Application 16369059
Patent Application
App. No. 16/369,059

REDUCTION OF SURFACE RECOMBINATION LOSSES IN MICRO-LEDS

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
16/369,059
Abstract

Disclosed herein are systems and methods for reducing surface recombination losses in micro-LEDs. In some embodiments, an LED includes a semiconductor layer including an active light emitting layer. A light outcoupling surface of the semiconductor layer has a diameter that is less than two times an electron diffusion length of a material of the semiconductor layer. The LED also includes a passivation layer that is formed on an outer surface of the semiconductor layer opposite to the light outcoupling surface. The passivation layer includes a dielectric material, and the passivation layer is in direct contact with a portion of the active light emitting layer.

Claims (32)

1 . A light-emitting diode comprising:

a semiconductor layer comprising an active light emitting layer, wherein a light outcoupling surface of the semiconductor layer has a diameter that is less than two times an electron diffusion length of a material of the semiconductor layer; and

a passivation layer that is formed on an outer surface of the semiconductor layer opposite to the light outcoupling surface, wherein:

the passivation layer comprises a dielectric material, and

the passivation layer is in direct contact with a portion of the active light emitting layer.

2 . The light-emitting diode of claim 1 , wherein the dielectric material comprises at least one of SiN x , SiO x , HfO x , AlN x , or AlO x .

3 . The light-emitting diode of claim 1 , wherein the semiconductor layer has a mesa shape, and the mesa shape is at least one of planar, vertical, conical, semi-parabolic, or parabolic.

4 . The light-emitting diode of claim 3 , wherein:

the mesa shape is parabolic, and

the diameter of the light outcoupling surface is less than 10 μm.

5 . The light-emitting diode of claim 1 , wherein the semiconductor layer comprises an n-side semiconductor layer adjacent to the light outcoupling surface and a p-side semiconductor layer opposite to the active light emitting layer.

6 . The light-emitting diode of claim 1 , wherein the semiconductor layer comprises a group III phosphide or a group III arsenide.

7 . The light-emitting diode of claim 1 , wherein the electron diffusion length is greater than 1 μm.

8 . A method comprising:

applying a chemical to an outer surface of a semiconductor layer of a light-emitting diode, wherein the semiconductor layer comprises an active light emitting layer, a light outcoupling surface of the semiconductor layer has a diameter that is less than two times an electron diffusion length of a material of the semiconductor layer, and the outer surface of the semiconductor layer is opposite to the light outcoupling surface of the semiconductor layer; and

subsequently depositing a passivation layer on the outer surface of the semiconductor layer, wherein:

the passivation layer comprises a dielectric material, and

the passivation layer is in direct contact with a portion of the active light emitting layer.

9 . The method of claim 8 , wherein the dielectric material comprises at least one of SiN x , SiO x , HfO x , AlN x , or AlO x .

10 . The method of claim 8 , wherein the semiconductor layer has a mesa shape, and the mesa shape is at least one of planar, vertical, conical, semi-parabolic, or parabolic.

11 . The method of claim 10 , wherein:

the mesa shape is parabolic, and

the diameter of the light outcoupling surface is less than 10 μm.

12 . The method of claim 8 , wherein the semiconductor layer comprises an n-side semiconductor layer adjacent to the light outcoupling surface and a p-side semiconductor layer opposite to the active light emitting layer.

13 . The method of claim 8 , wherein the semiconductor layer comprises a group III phosphide or a group III arsenide.

14 . The method of claim 8 , wherein the electron diffusion length is greater than 1 μm.

15 . The method of claim 8 , wherein the chemical comprises ammonium sulfide.

16 . The method of claim 8 , wherein the chemical comprises ZnSe.

17 . The method of claim 8 , wherein the chemical is applied by molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), or metal organic vapor phase epitaxy (MOVPE).

18 . The method of claim 8 , wherein the dielectric material is deposited in an atmosphere having a pressure less than 10 mbar.

19 . The method of claim 8 , wherein the dielectric material is deposited by atomic layer deposition (ALD), inductively coupled plasma (ICP), plasma-enhanced chemical vapor deposition (PECVD), or inductively coupled plasma chemical vapor deposition (ICP CVD).

20 . The method of claim 8 , further comprising, before applying the chemical to the outer surface of the semiconductor layer, performing at least one of wet etching or cleaning of the outer surface of the semiconductor layer.

Assignments (2)
CHANGE OF NAME Recorded May 19, 2022
From: FACEBOOK TECHNOLOGIES, LLC
To: META PLATFORMS TECHNOLOGIES, LLC
Reel/Frame 060130/0404 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2019
From: LAUERMANN, THOMAS; LUTGEN, STEPHAN; HWANG, DAVID
To: FACEBOOK TECHNOLOGIES, LLC
Reel/Frame 048781/0221 →