IP Library Granted Patent US 10,733,522
Granted Patent B2
US 10,733,522 · App. 16/375,990 · Granted Aug 4, 2020

Generating quantum logic control sequences for quantum information processing hardware

Inventors: Michael J. Curtis (Sacramento, CA); William J. Zeng (Berkeley, CA); Eyob A. Sete (Walnut Creek, CA)
Assignee: Rigetti & Co, Inc.
G06N10/00G06F16/9024G06N5/022B82Y10/00
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Quick Facts
Patent No.
US 10,733,522
App. No.
16/375,990
Granted
Aug 4, 2020
Kind
B2
Abstract

In a general aspect, a quantum logic control sequence is generated for a quantum information processor. In some aspects, a quantum computation to be performed by a quantum information processor is identified. The quantum information processor includes data qubits and is configured to apply entangling quantum logic operations to respective pairs of the data qubits. A graph representing the quantum information processor is defined. The graph includes vertices and edges; the vertices represent the data qubits, and the edges represent the entangling quantum logic operations. A quantum logic control sequence is generated based on the graph. The quantum logic control sequence includes a sequence of quantum logic operations configured to perform the quantum computation when executed by the quantum information processor.

Claims (49)

1. A method of generating a quantum logic control sequence for execution by a quantum information processor, the method comprising:

identifying a quantum computation to be performed by a quantum information processor, the quantum information processor comprising data qubits and configured to apply entangling quantum logic operations to respective pairs of the data qubits;

defining a graph representing the quantum information processor, the graph comprising vertices and edges, the vertices representing the data qubits, the edges representing the entangling quantum logic operations; and

generating a quantum logic control sequence based on the graph, the quantum logic control sequence comprising a sequence of quantum logic operations configured to perform the quantum computation when executed by the quantum information processor.

2. The method of claim 1 , wherein the graph comprises weights associated with the edges, the weight for each edge being a measured, simulated or estimated fidelity for the entangling quantum logic operation represented by the edge.

3. The method of claim 2 , wherein the measured fidelity is obtained by performing quantum process tomography of the entangling quantum logic operation.

4. The method of claim 2 , wherein the simulated fidelity is obtained by numerically simulating the entangling quantum logic operation on a classical processor.

5. The method of claim 4 , wherein numerically simulating the entangling quantum logic operation accounts for noise processes.

6. The method of claim 1 , wherein the quantum information processor comprises a superconducting circuit.

7. The method of claim 1 , wherein the quantum information processor comprises a gate-based quantum information processor, the entangling quantum logic operations comprise entangling gates and the quantum logic control sequence comprises a quantum logic circuit comprising a sequence of quantum logic gates.

8. The method of claim 1 , wherein the quantum computation comprises a simulation of a Fermionic system, and identifying the quantum computation comprises identifying a Hamiltonian for the Fermionic system.

9. The method of claim 1 , comprising executing the quantum logic control sequence on the quantum information processor.

10. The method of claim 1 , wherein generating the quantum logic control sequence comprises recovering an approximation of an exponentiation of a Hamiltonian.

11. The method of claim 10 , wherein the exponentiation of the Hamiltonian is an application of a Trotter expansion.

12. The method of claim 10 , wherein generating the quantum logic control sequence comprises using a Trotter approximation.

13. A system comprising:

a data processing apparatus; and

a computer-readable medium storing instructions that are operable when executed by the data processing apparatus to perform operations comprising:

identifying a quantum computation to be performed by a quantum information processor, the quantum information processor comprising data qubits and configured to apply entangling quantum logic operations to respective pairs of the data qubits;

defining a graph representing the quantum information processor, the graph comprising vertices and edges, the vertices representing the data qubits, the edges representing the entangling quantum logic operations; and

generating a quantum logic control sequence based on the graph, the quantum logic control sequence comprising a sequence of quantum logic operations configured to perform the quantum computation when executed by the quantum information processor.

14. The system of claim 13 , wherein the graph comprises weights associated with the edges, the weight for each edge being a measured, simulated or estimated fidelity for the entangling quantum logic operation represented by the edge.

15. The system of claim 14 , wherein the measured fidelity is obtained by performing quantum process tomography of the entangling quantum logic operation.

16. The system of claim 14 , wherein the simulated fidelity is obtained by numerically simulating the entangling quantum logic operation on a classical processor.

17. The system of claim 16 , wherein numerically simulating the entangling quantum logic operation accounts for noise processes.

18. The system of claim 13 , wherein the quantum information processor comprises a gate-based quantum information processor, the entangling quantum logic operations comprise entangling gates and the quantum logic control sequence comprises a quantum logic circuit comprising a sequence of quantum logic gates.

19. The system of claim 13 , wherein generating the quantum logic control sequence comprises recovering an approximation of an exponentiation of a Hamiltonian.

20. The system of claim 19 , wherein the exponentiation of the Hamiltonian is an application of a Trotter expansion.

21. The system of claim 19 , wherein generating the quantum logic control sequence comprises using a Trotter approximation.

22. A system comprising:

a quantum information processor comprising qubit devices and configured to apply entangling quantum logic operations to respective pairs of the qubit devices;

a computer system comprising one or more processors configured to perform operations comprising:

identifying a quantum computation to be performed by the quantum information processor;

defining a graph representing the quantum information processor, the graph comprising vertices and edges, the vertices representing the qubit devices, the edges representing the entangling quantum logic operations; and

generating a quantum logic control sequence based on the graph, the quantum logic control sequence comprising a sequence of quantum logic operations configured to perform the quantum computation when executed by the quantum information processor.

23. The system of claim 22 , wherein the graph comprises weights associated with the edges, the weight for each edge being a measured, simulated or estimated fidelity for the entangling quantum logic operation represented by the edge.

24. The system of claim 23 , wherein the measured fidelity is obtained by performing quantum process tomography of the entangling quantum logic operation.

25. The system of claim 23 , wherein the simulated fidelity is obtained by numerically simulating the entangling quantum logic operation on a classical processor.

26. The system of claim 25 , wherein numerically simulating the entangling quantum logic operation accounts for noise processes.

27. The system of claim 22 , wherein the quantum information processor comprises a superconducting circuit.

28. The system of claim 22 , wherein the quantum information processor comprises a gate-based quantum information processor, the entangling quantum logic operations comprise entangling gates and the quantum logic control sequence comprises a quantum logic circuit comprising a sequence of quantum logic gates.

29. The system of claim 22 , further comprising a control system configured to:

receive the quantum logic control sequence from the computer system;

generate control signals configured to cause the quantum information processor to execute the quantum logic control sequence; and

output the control signals for delivery to the quantum information processor.

30. The system of claim 29 , further comprising a signal delivery system configured to transfer the control signals from the control system to the quantum information processor.

31. The system of claim 22 , wherein generating the quantum logic control sequence comprises recovering an approximation of an exponentiation of a Hamiltonian.

32. The system of claim 31 , wherein the exponentiation of the Hamiltonian is an application of a Trotter expansion.

33. The system of claim 31 , wherein generating the quantum logic control sequence comprises using a Trotter approximation.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC
Reel/Frame 069603/0771 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
Reel/Frame 069603/0831 →
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 8, 2024
From: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0416 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 10, 2021
From: RIGETTI & CO, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 055557/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2019
From: CURTIS, MICHAEL J.; ZENG, WILLIAM J.; SETE, EYOB A.
To: RIGETTI & CO, INC.
Reel/Frame 048801/0434 →
Cited By (4)
US 12,293,221 US 12,443,869 US 12,487,896 US 12,602,245