Synchronization control apparatus and synchronization control method
View Patent ↗According to one embodiment, there is provided a synchronization control apparatus which synchronizes an STC counter value, based on TAI (Temps Atomique International: international atomic time) time, in each of systems which constitute a transmission system in a broadcasting system or a distribution system, the apparatus includes a processor or a dedicated arithmetic circuit configured to determine a time length in which the STC counter value laps, to calculate a remainder of the time length relative to the TAI time, and to convert the remainder to the STC counter value, thereby determining the STC counter value.
1. A synchronization control apparatus which synchronizes a system time clock (STC) counter value, based on TAI (Temps Atomique International: international atomic time) time, in each of systems which constitute a transmission system in a broadcasting system or a distribution system, comprising:
a processor or a dedicated arithmetic circuit configured to determine a time length in which the STC counter value laps, to calculate a remainder of the time length relative to the TAI time, and to convert the remainder to the STC counter value, thereby determining the STC counter value.
2. The synchronization control apparatus of claim 1 , wherein when the processor or the dedicated arithmetic circuit calculates the remainder, the processor or the dedicated arithmetic circuit is further configured to calculate a remainder of an integer or a finite decimal, which is obtained by multiplying the time length by an integer.
3. The synchronization control apparatus of claim 2 , wherein when the processor or the dedicated arithmetic circuit calculates the remainder of the integer or the finite decimal, when the processor or the dedicated arithmetic circuit calculates the remainder by the finite decimal, the processor or the dedicated arithmetic circuit is further configured to multiply the TAI time and the finite decimal by 10 n (n being a natural number), such that the finite decimal becomes an integer.
4. The synchronization control apparatus of claim 1 , wherein the systems include a first system and a second system which are identically configured,
each of the first system and the second system includes an encoder and a multiplexing apparatus, and
the synchronization control apparatus is provided in the encoders in the first system and the second system, or in the multiplexing apparatuses in the first system and the second system, or in both the encoders and the multiplexing apparatuses in the first system and the second system.
5. A synchronization control method for synchronizing a system time clock (STC) counter value, based on TAI (Temps Atomique International: international atomic time) time, in each of systems which constitute a transmission system in a broadcasting system or a distribution system, comprising:
determining, in each of the systems, a time length in which the STC counter value laps;
calculating, in each of the systems, a remainder of the time length relative to the TAI time; and
converting, in each of the systems, the remainder to the STC counter value, thereby determining the STC counter value.
6. The synchronization control method of claim 5 , wherein the STC counter value is a PCR (program clock reference) value composed of a base of a first frequency and an extension of a second frequency.
7. The synchronization control method of claim 5 , wherein the calculating step includes calculating a remainder of an integer or a finite decimal, which is obtained by multiplying the time length by an integer.
8. The synchronization control method of claim 7 , wherein the step of calculating the remainder of the integer or the finite decimal includes multiplying, when calculating the remainder by the finite decimal, the TAI time and the finite decimal by 10 n (n being a natural number), such that the finite decimal becomes an integer.