Memory system for performing a different program operation based on a size of data and an operating method thereof
A memory system may include: a memory device including a plurality of dies; and a controller suitable for controlling the memory device, wherein the controller includes: a buffer including a plurality of entries suitable for temporarily storing target data; a monitor suitable for comparing a size of the target data with a predetermined threshold value; a buffer manager suitable for determining, when the size of the target data is equal to or greater than the predetermined threshold value, a skip value based on physical information of the memory device, and storing a start entry and an end entry in which the target data is stored; and a processor suitable for controlling the memory device to perform a program operation on the target data through an interleaving programming method based on the start entry, the end entry, and the skip value.
1. A memory system comprising:
a memory device including a plurality of dies; and
a controller suitable for controlling the memory device,
wherein the controller includes:
a buffer including a plurality of entries suitable for temporarily storing target data;
a monitor suitable for comparing a size of the target data with a predetermined threshold value;
a buffer manager suitable for determining, when the size of the target data is equal to or greater than the predetermined threshold value, a skip value based on physical information of the memory device, and storing a start entry and an end entry in which the target data is stored; and
a processor suitable for controlling the memory device to perform a program operation on the target data through an interleaving programming method based on the start entry, the end entry, and the skip value.
2. The memory system of claim 1 , wherein when the size of the target data is smaller than the predetermined threshold value, the buffer manager stores the start entry and the end entry, and
the processor controls the memory device to perform a program operation on the target data through a sequential programming method based on the start entry and the end entry.
3. The memory system of claim 2 , wherein when the program operation is performed through the sequential programming method, the target data is programmed into the plurality of dies of the memory device according to a predetermined programming order.
4. The memory system of claim 1 , wherein the physical information of the memory device includes the number of dies forming a super block and the number of blocks related to a super block in one die.
5. The memory system of claim 1 , wherein the predetermined threshold value is a size of one strip included in the super block,
wherein the strip denotes a group of physical pages positioned at the same offset in the same super block.
6. The memory system of claim 1 , wherein the processor assigns the target data to the plurality of entries of the buffer.
7. The memory system of claim 1 , wherein each of the plurality of entries has the same size as a size of one physical page or a size of one logical page in the memory device.
8. The memory system of claim 1 , wherein the size of the target data is determined based on a logical address corresponding to the target data.
9. A method for operating a memory system with a controller and a memory device including a plurality of dies, the method comprising:
temporarily storing target data into a plurality of entries included in a buffer;
storing a start entry and an end entry in which the target data is stored, among the plurality of entries;
comparing a size of the target data with a predetermined threshold value;
determining a skip value based on physical information of the memory device when the size of the target data is equal to or greater than a predetermined threshold value; and
programming the target data through a interleaving programming method based on the start entry, the end entry, and the skip value.
10. The method of claim 9 , further comprising:
programming, when the size of the target data is smaller than the predetermined threshold, the target data through a sequential programming method based on the start entry and the end entry.
11. The method of claim 10 , wherein in the programming of the target data through the sequential programming method,
the target data is programmed into plurality of dies according to a predetermined programming order.
12. The method of claim 9 , wherein the physical information of the memory device includes the number of dies forming a super block and the number of blocks related to a super block in one die.
13. The method of claim 9 , wherein the predetermined threshold value is a size of one strip included in the super block,
wherein the strip denotes a group of physical pages positioned at the same offset in the same super block.
14. The method of claim 9 , wherein further comprising:
assigning the target data to the plurality of entries of the buffer.
15. The method of claim 14 , wherein each of the entries has the same size as a size of one physical page or a size of one logical page in the memory device.
16. The method of claim 9 , wherein the size of the target data is determined based on a logical address corresponding to the target data.
17. A memory system comprising:
a memory device including a plurality of dies; and
a controller suitable for controlling the memory device,
wherein the controller includes:
a plurality of entries suitable for temporarily storing target data to be programmed into the plurality of dies of the memory device;
a monitor suitable for determining a size of the target data;
a buffer manager suitable for storing a start entry and an end entry in which the target data is stored; and
a processor suitable for controlling the memory device to perform a program operation on the target data through an interleaving programming method or a sequential programming method based on the start entry, the end entry.
18. The memory system of claim 17 , wherein when the size of the target data is equal to or greater than a predetermined threshold value,
the buffer manager determines a skip value based on the number of dies forming a super block and the number of blocks related to a super block in one die; and
the processor controls the memory device to perform a program operation on the target data through the interleaving programming method.
19. The memory system of claim 17 , wherein when the size of the target data is smaller than a predetermined threshold value,
the buffer manager stores the start entry and the end entry, and
the processor controls the memory device to perform a program operation on the target data through the sequential programming method based on the start entry and the end entry.
20. The memory system of claim 17 , wherein
each of the plurality of entries has the same size as a size of one physical page or a size of one logical page in the memory device.