Semiconductor devices

1. A semiconductor device, comprising:

a substrate;

an active region upwardly protruding from the substrate, the active region comprising an upper portion and a lower portion;

a plurality of active fins upwardly protruding from the active region and extending in a first direction parallel to an upper surface of the substrate, the plurality of active fins being provided in a second direction that is parallel to the upper surface of the substrate and intersects with the first direction; and

an isolation structure provided on the substrate, the isolation structure covering a first sidewall of the active region and a lower portion of a sidewall of each of the plurality of active fins,

wherein the first sidewall of the active region is provided adjacent to a first active fin among the plurality of active fins, the first active fin being provided on a first edge of the active region in the second direction,

wherein the first sidewall of the active region comprises a sidewall of the upper portion of the active region and a sidewall of the lower portion of the active region, and

wherein the sidewall of the upper portion of the active region, an upper surface of the upper portion of the active region, and the sidewall of the first active fin form a staircase shape.

2. The semiconductor device of claim 1 ,

wherein a first distance from the sidewall of the upper portion of the active region to the sidewall of the first active fin in the second direction is smaller than a second distance from the sidewall of the lower portion of the active region to the sidewall of the first active fin in the second direction, the first distance and the second distance being greater than zero.

3. The semiconductor device of claim 1 , wherein a second sidewall of the active region adjacent to a second active fin among the plurality of active fins has a constant slope with respect to the upper surface of the substrate, the second active fin being provided on a second edge of the active region opposite to the first edge in the second direction.

4. The semiconductor device of claim 1 , further comprising:

a protrusion provided between the first active fin and the first sidewall of the active region.

5. The semiconductor device of claim 4 , wherein an upper surface of the protrusion is lower than an upper surface of the isolation structure.

6. The semiconductor device of claim 3 , wherein the sidewall of the second active fin directly contacts the second sidewall of the active region.

7. The semiconductor device of claim 3 , wherein the isolation structure comprises a first isolation pattern, a second isolation pattern, and a third isolation pattern provided in the second direction.

8. The semiconductor device of claim 7 , wherein an upper surface of the first isolation pattern, and an upper surface of the second isolation pattern, and an upper surface of the third isolation pattern are provided at a same height.

9. The semiconductor device of claim 7 , wherein the first isolation pattern covers the lower portion of the sidewall of each of the plurality of active fins, the second isolation pattern covers an upper portion of the second sidewall of the active region, and the third isolation pattern covers a lower portion of the second sidewall of the active region.

10. The semiconductor device of claim 1 , wherein two active fins among the plurality of active fins are provided on the active region.

11. The semiconductor device of claim 1 , further comprising:

a gate structure provided on the plurality of active fins and the isolation structure, respectively, the gate structure extending in the second direction;

a source/drain layer provided on the plurality of active fins adjacent to the gate structure; and

a protrusion provided between the first active fin and the first sidewall of the active region.

12. The semiconductor device of claim 11 ,

wherein the source/drain layer is not provided on the protrusion.

13. A semiconductor device, comprising:

a substrate;

an active region upwardly protruding from the substrate, the active region comprises:

a lower portion having a first width in a second direction parallel to an upper surface of the substrate; and

an upper portion provided on the lower portion, the upper portion having a second width smaller than the first width in the second direction;

an active fin upwardly protruding from the active region and extending in a first direction, the first direction being parallel to the upper surface of the substrate and intersecting with the second direction;

an isolation structure provided on the substrate, the isolation structure covering a first sidewall of the active region and a lower portion of a sidewall of the active fin; and

a protrusion provided between the active fin and the first sidewall of the active region.

14. The semiconductor device of claim 13 , wherein the first sidewall of the active region in the second direction is bent at a boundary between the upper portion of the active region and the lower portion of the active region.

15. The semiconductor device of claim 14 , wherein a second sidewall of the active region opposite to the first sidewall in the second direction is flat at the boundary between the upper portion of the active region and the lower portion of the active region.

16. The semiconductor device of claim 14 ,

wherein a height of an upper surface of the protrusion is lower than a height of an upper surface of the isolation structure.

17. The semiconductor device of claim 13 , further comprising a plurality of active fins provided in the second direction on the active region, the plurality of active fins comprises the active fin.

18. A semiconductor device, comprising:

a substrate;

an active region upwardly protruding from the substrate, the active region comprising an upper portion and a lower portion;

a plurality of active fins upwardly protruding from the active region and extending in a first direction parallel to an upper surface of the substrate, the plurality of active fins being provided in a second direction that is parallel to the upper surface of the substrate and intersects with the first direction;

an isolation structure provided on the substrate, the isolation structure covering a first sidewall of the active region and a lower portion of a sidewall of each of the plurality of active fins;

a gate structure provided on the plurality of active fins and the isolation structure, respectively, the gate structure extending in the second direction; and

a source/drain layer provided on the plurality of active fins adjacent to the gate structure,

wherein the first sidewall of the active region is provided adjacent to a first active fin among the plurality of active fins, the first active fin being provided on a first edge of the active region in the second direction,

wherein the first sidewall of the active region comprises a sidewall of the upper portion of the active region and a sidewall of the lower portion of the active region, and

wherein the sidewall of the upper portion of the active region, an upper surface of the upper portion of the active region, and the sidewall of the first active fin form a staircase shape.

19. The semiconductor device of claim 18 , further comprising:

a protrusion provided between the first active fin and the first sidewall of the active region,

wherein a height of an upper surface of the protrusion is lower than a height of an upper surface of the isolation structure.

20. The semiconductor device of claim 19 , wherein the source/drain layer is not provided on the protrusion.