IP Library Granted Patent US 11,075,266
Granted Patent B2
US 11,075,266 · App. 16/397,452 · Granted Jul 27, 2021

Vertically stacked fin semiconductor devices

Inventors: Praveen Joseph (Albany, NY); Tao Li (Albany, NY); Indira Seshadri (Niskayuna, NY); Ekmini A. De Silva (Slingerlands, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L29/0649H01L21/0217H01L21/02164H01L21/02238H01L21/02381H01L21/3065H01L21/30604H01L21/31116H01L21/7624H01L21/823821H01L21/823878H01L27/0924H01L29/66795H01L29/7851
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Quick Facts
Patent No.
US 11,075,266
App. No.
16/397,452
Granted
Jul 27, 2021
Kind
B2
Abstract

Semiconductor devices and methods of forming the same include forming a first dielectric layer around a semiconductor fin, formed from a first dielectric material, to a target height lower than a height of the semiconductor fin. A second dielectric layer is deposited on the first dielectric layer and is formed from a second dielectric material. A third dielectric layer, formed from the first dielectric material, is formed on the second dielectric layer. The second dielectric layer is etched away to expose a gap on the semiconductor fin. A portion of the semiconductor fin that is exposed in the gap is oxidized to form an isolation layer.

Claims (32)

1. A method of forming a semiconductor device, comprising:

forming a first dielectric layer around a semiconductor fin, formed from a first dielectric material, to a target height lower than a height of the semiconductor fin;

depositing a second dielectric layer on the first dielectric layer, formed from a second dielectric material;

forming a third dielectric layer, formed from the first dielectric material, on the second dielectric layer;

etching away the second dielectric layer to expose a gap on the semiconductor fin; and

oxidizing a portion of the semiconductor fin exposed in the gap to form an isolation layer.

2. The method of claim 1 , wherein oxidizing the portion of the semiconductor fin is timed to produce the first vertical thickness of the isolation layer.

3. The method of claim 1 , wherein forming the first dielectric layer comprises:

treating an upper portion of the semiconductor fin down to the target height; and

depositing the first dielectric material using a process that does not adhere to the treated upper portion.

4. The method of claim 1 , wherein forming the first dielectric layer comprises:

depositing the first dielectric material around the semiconductor to a height above the height of the semiconductor fin; and

etching the first dielectric material down to the target height.

5. The method of claim 1 , wherein the first dielectric material is silicon nitride and the second dielectric material is an oxide.

6. The method of claim 5 , wherein the second dielectric material is silicon dioxide.

7. A method of forming semiconductor devices, comprising:

forming a first dielectric layer around a first semiconductor fin in a first device region, formed from a first dielectric material, to a first target height lower than a height of the first semiconductor fin;

depositing a second dielectric layer on the first dielectric layer, formed from a second dielectric material;

forming a third dielectric layer, formed from the first dielectric material, on the second dielectric layer;

etching away the second dielectric layer to expose a gap on the first semiconductor fin;

oxidizing a portion of the semiconductor fin exposed in the gap on the first semiconductor fin to form a first isolation layer having a first vertical thickness;

forming a fourth dielectric layer around a second semiconductor fin in a second device region, formed from the first dielectric material, to a second target height lower than a height of the second semiconductor fin;

depositing a fifth dielectric layer on the fourth dielectric layer, formed from the second dielectric material;

forming a sixth dielectric layer on the fifth dielectric layer, formed from the first dielectric material;

etching away the fifth dielectric layer to expose a gap on the second semiconductor fin; and

oxidizing a portion of the second semiconductor fin exposed in the gap on the second semiconductor fin to form a second isolation layer having a second vertical thickness.

8. The method of claim 7 , wherein oxidizing the portion of the first semiconductor fin is timed to produce the first vertical thickness of the isolation layer.

9. The method of claim 7 , wherein the first vertical thickness is different from the second vertical thickness.

10. The method of claim 7 , wherein the first target height is different from the second target height.

11. The method of claim 7 , wherein the first semiconductor fin and the second semiconductor fin have a same height.

12. The method of claim 7 , wherein the first dielectric material is silicon nitride and the second dielectric material is an oxide.

13. The method of claim 12 , wherein the second dielectric material is silicon dioxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2019
From: JOSEPH, PRAVEEN; LI, TAO; SESHADRI, INDIRA; DE SILVA, EKMINI A.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 049023/0098 →
Continuity (1)
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