Dynamical isolation of a cryogenic processor
A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
1. A switch to dynamically isolate a device, the switch comprising:
a plurality of cascade elements superconductingly electrically communicatively coupled in series, each cascade element of the plurality of cascade elements comprising:
a respective first plurality of N Superconducting Quantum Interference Devices (SQUIDs) superconductingly electrically communicatively coupled in series in a first arm, each SQUID of the first plurality of SQUIDs comprising at least one Josephson Junction;
a respective matching capacitor; and
a respective second plurality of M SQUIDs superconductingly electrically communicatively coupled in series in a second arm, opposite the first arm with respect to the matching capacitor, each SQUID of the second plurality of SQUIDs comprising at least one Josephson Junction.
2. The switch of claim 1 wherein the total number of SQUIDS N in the first plurality of N SQUIDS is equal to the total number of SQUIDS M in the second plurality of M SQUIDS.
3. The switch of claim 1 further comprising a flux bias line and at least one filtering element along the flux bias line, the filtering element operable to cause the switch to operate at an operating speed.
4. The switch of claim 3 wherein the at least one filtering element is selected from a group consisting of: a passive filtering elements, inductive chokes and kinetic inductors.
5. A method for dynamically isolating a superconducting processor, the superconducting processor electrically coupled to a switch, the switch comprising a flux bias line and a plurality of cascade elements in series, each cascade element comprising a respective first plurality of N Superconducting Quantum Interference Devices (SQUIDs) superconductingly electrically communicatively coupled in series in a first arm, each SQUID of the first plurality of SQUIDs comprising at least one Josephson Junction, a respective matching capacitor and a respective second plurality of M SQUIDs superconductingly electrically communicatively coupled in series in a second arm, opposite the first arm with respect to the matching capacitor, each SQUID of the second plurality of SQUIDs comprising at least one Josephson Junction, the method comprising:
modulating the bias line to set the switch to a passing state;
sending a signal to the superconducting processor;
modulating the bias line to set the switch to a suppressed state;
causing the superconducting processor to perform a calculation;
modulating the bias line to set the switch to a passing state; and
reading out an output from the superconducting processor.
6. The method of claim 5 wherein sending a signal to the superconducting processor includes sending a signal to a quantum processor, causing the superconducting processor to perform a calculation includes causing a quantum processor to perform a calculation, and reading out an output from the superconducting processor includes reading out an output from a quantum processor.
7. The method of claim 5 wherein sending a signal to the superconducting processor includes sending a microwave control signal to the superconducting processor, and reading out an output from the superconducting processor includes reading out an output from the superconducting processor via microwave control signal lines.
8. The method of claim 7 wherein sending a microwave control signal to the superconducting processor includes sending an non-continuous microwave control signal.
9. The method of claim 5 further comprising isolating the superconducting processor via at least one filtering element along the flux bias line, the filtering element causing the switch to operate at an operating speed, the filtering element selected from a group consisting of: passive filtering elements, inductive chokes and kinetic inductors.
10. A system, the system comprising:
a tunable thermal bath, the tunable bath comprising:
a variable temperature resistor; and
a switch, electrically connected in series with the variable temperature resistor, the switch comprising:
a plurality of cascade elements superconductingly electrically communicatively coupled in series, each cascade element of the plurality of cascade elements comprising:
a respective first plurality of N Superconducting Quantum Interference Devices (SQUIDs) superconductingly electrically communicatively coupled in series in a first arm, each SQUID of the first plurality of SQUIDs comprising at least one Josephson Junction;
a respective matching capacitor; and
a respective second plurality of M SQUIDs superconductingly electrically communicatively coupled in series in a second arm, opposite the first arm with respect to the matching capacitor, each SQUID of the second plurality of SQUIDs comprising at least one Josephson Junction; and
a processor, the processor dynamically coupled to the tunable thermal bath.
11. The system of claim 10 , further comprising a low-pass filter, electrically connected in series with the switch.
12. The system of claim 10 wherein the processor is a quantum processor.
13. The system of claim 12 further comprising a digital processor electrically coupled to the quantum processor and the tunable thermal bath, the digital processor operable to
tune the tunable thermal bath to an initial temperature T;
cause the quantum processor to be electrically coupled to the tunable thermal bath;
program the quantum processor with a problem Hamiltonian; and
cause the quantum processor to start evolving.
14. The system of claim 13 further comprising the digital processor varying the initial temperature T via the tunable thermal bath during the evolution of the quantum processor.
15. The system of claim 13 wherein the digital processor is operable to set the switch to a passing state by modulating a flux bias line electrically coupled to the switch to cause the quantum processor to be electrically coupled to the tunable thermal bath.
16. The system of claim 13 further comprising the digital processor operable to iteratively:
cause the quantum processor to be isolated from the tunable thermal bath;
tune the temperature of the tunable thermal bath to a temperature T_i;
cause the quantum processor to be coupled to the tunable thermal bath; and
cause the processor to start evolving.
17. The method of claim 16 wherein the digital processor is operable to set the switch to be set to a suppressed state by modulating a flux bias line electrically coupled to the switch to cause the quantum processor to be isolated from the tunable thermal bath.
18. The system of claim 10 further comprising a transmission line, the transmission line providing electrical coupling between the tunable thermal bath and the processor.
19. The system of claim 18 wherein the electrical coupling includes one of a tunable coupling, a capacitive coupling, an inductive coupling, and a resonator-based coupling.