Highly linear low noise transconductor
A transconductance circuit comprises a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device. The gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device. The gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device. The source node of the first transistor is coupled to a reference voltage via the first source-degeneration device. The source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.
1. A system comprising:
a transconductance circuit configured to convert an input voltage to an output current, the transconductance circuit comprising a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device, wherein:
a gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device;
a gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device;
the source node of the first transistor is coupled to a reference voltage via the first source-degeneration device; and
the source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.
2. The system of claim 1 , comprising a first bleeder device and a second bleeder device.
3. The system of claim 2 , wherein:
the first bleeder device is coupled in parallel with the first source-degeneration device; and
the second bleeder device is coupled in parallel with the second source-degeneration device.
4. The system of claim 2 , wherein the first bleeder device comprises a third transistor and the second bleeder device comprises a fourth transistor.
5. The system of claim 1 , wherein:
an impedance of the first feedback device is equal, to within 5%, of an output impedance of a circuit that provides the input voltage; and
an impedance of the second feedback device is equal, to within 5%, of an output impedance of a circuit that provides the input voltage.
6. The system of claim 1 , wherein:
the input voltage is a differential signal; and
the transconductance circuit is configured to receive the input voltage across gate nodes of the first transistor and the second transistor.
7. The system of claim 1 , wherein:
the output current is a differential signal; and
the transconductance circuit is configured to provide the output current at drain nodes of the first transistor and the second transistor.
8. The system of claim 1 , wherein the first transistor and the second transistor are metal-oxide-semiconductor (MOS) devices.
9. A system comprising:
a transconductance circuit comprising a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device, wherein:
a gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device;
a gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device;
the source node of the first transistor is coupled to a reference voltage via the first source-degeneration device; and
the source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.
10. The system of claim 9 , comprising a first bleeder device and a second bleeder device.
11. The system of claim 10 , wherein:
the first bleeder device is coupled in parallel with the first source-degeneration device; and
the second bleeder device is coupled in parallel with the second source-degeneration device.
12. The system of claim 10 , wherein the first bleeder device comprises a third transistor and the second bleeder device comprises a fourth transistor.
13. The system of claim 9 , wherein:
an impedance of the first feedback device is equal, to within 5%, of an output impedance of a circuit that provides an input voltage or current to the transconductance circuit; and
an impedance of the second feedback device is equal, to within 5%, of an output impedance of a circuit that provides an input voltage or current to the transconductance circuit.
14. The system of claim 9 , wherein the transconductance circuit is configured to convert an input voltage to an output current.
15. The system of claim 14 , wherein:
the input voltage is a differential signal; and
the transconductance circuit is configured to receive the input voltage across gate nodes of the first transistor and the second transistor.
16. The system of claim 14 , wherein:
the output current is a differential signal; and
the transconductance circuit is configured to provide the output current at drain nodes of the first transistor and the second transistor.
17. The system of claim 9 , wherein the first transistor and the second transistor comprise one or more of a metal-oxide-semiconductor field-effect transistor(MOSFET), fin field-effect transistor (FINFET), bipolar junction transistor (BJT), and junction field-effect transistor.
18. The system of claim 9 , wherein the first feedback device is a first resistor and the second feedback device is a second resistor.
19. The system of claim 9 , wherein the first source-degeneration device is a first resistor and the second source-degeneration device is a second resistor.