Driving circuit for switches used in a charge pump

1. An apparatus comprising a power converter comprising a charge pump that comprises a switching network to interconnect pump capacitors, wherein said switching network comprises transistors and a controller, wherein said controller is to cause said transistors to transition between conducting and non-conducting states thereby causing said pump capacitors to be interconnected in different arrangements, wherein said transistors comprise a first transistor that is to transition into a conducting state when a source and gate of said first transistor are at equal potentials, said switching network further comprising a gate driver connected to a gate of said first transistor, wherein a source of said first transistor is connected to said gate driver.

2. The apparatus of claim 1 , wherein, during operation of said charge pump, a source potential of said first transistor varies with time.

3. The apparatus of claim 1 , wherein, to cause said first transistor to cease conducting, said gate driver applies, to said gate, a voltage that varies with said different arrangements of said power converter and that remains constant during a particular arrangement of said power converter.

4. The apparatus of claim 1 , further comprising a driver to drive said first transistor, said driver comprising a voltage governor to cause an output voltage of said driver to vary in response to variations in a source voltage of said first transistor.

5. The apparatus of claim 1 , further comprising first and second dies, wherein said first die comprises said first transistor, wherein said second die comprises a first drive circuit to drive said first transistor, wherein a communication link exists between said first and second dies, and wherein said first and second dies are made from different semiconductors.

6. The apparatus of claim 1 , further comprising a first die that is formed from a substrate other than silicon and a second die that is formed from a silicon substrate, wherein said first die comprises said first transistor, wherein said second die comprises a first drive circuit to drive said first transistor, and wherein a communication link exists between said first and second dies.

7. The apparatus of claim 1 , further comprising a driver for driving said first transistor, said driver comprising a Zener diode connected in parallel with a bias capacitor, the voltage across which controls an offset between said first transistor's gate and source voltages when said first transistor is made to cease conduction, and wherein said Zener diode connects between said first transistor's source and a voltage source.

8. The apparatus of claim 1 , further comprising a driver for driving said first transistor, wherein said driver comprises a bias capacitor to connect to a switch that is to close when a voltage across said bias capacitor is in excess of a desired offset between said drain and source of said first transistor.

9. The apparatus of claim 1 , further comprising a driver for driving said first transistor, wherein said driver comprises a bias capacitor, a differential amplifier, and a switch, wherein said bias capacitor is connected to said switch, wherein said differential amplifier is to provide a control signal to open and close said switch, wherein said differential amplifier comprises first and second inputs to define a voltage difference that varies in response to variations in voltage across said bias capacitor, and wherein a voltage across said bias capacitor is to control an offset between said first transistor's gate and source voltages when said first transistor is made to cease conduction.

10. The apparatus of claim 1 , further comprising a driver to drive said first transistor, wherein said driver comprises a bias capacitor and a switch connected to said bias capacitor, wherein said switch is to receive a signal to open and close in response to variations in a source voltage of said first transistor, and wherein a voltage across said bias capacitor is to control a difference between a gate voltage and a source voltage of said first transistor.

11. The apparatus of claim 1 , further comprising a driver to drive said first transistor, wherein said driver comprises a switched-capacitor circuit comprising first and second switches and first and second capacitors, wherein a voltage across said first capacitor is to govern a voltage difference between a source and gate of said first transistor, wherein said second capacitor is to replenish charge on said first capacitor as needed to maintain a desired voltage, and wherein said switches are to connect and disconnect said first and second capacitors from each other.

12. The apparatus of claim 1 , further comprising a driver to drive said first transistor, wherein said driver comprises a switched-capacitor circuit that comprises first and second switches and first and second capacitors, wherein a voltage across said first capacitor is to govern a voltage difference between a source and gate of said first transistor, wherein said second capacitor is to replenish charge on said first capacitor as needed to maintain a desired voltage, and wherein said switches are to connect and disconnect said first and second capacitors from each other and to connect and disconnect said second capacitor from an external voltage source.

13. The apparatus of claim 1 , wherein said charge pump comprises an internal node that is at an intermediate voltage, wherein said apparatus further comprises a driver that comprises a switched-capacitor circuit, wherein said switched-capacitor circuit comprises a first capacitor and a second capacitor, wherein a voltage across said first capacitor is to govern a voltage difference between a source and gate of said first transistor, and wherein said second capacitor is to connect to said node to obtain charge for use in replenishing said first capacitor as needed to maintain a desired voltage across said first capacitor.

14. The apparatus of claim 1 , wherein said charge pump comprises an internal node that is at an intermediate voltage, wherein said apparatus further comprises a driver that comprises a switched-capacitor circuit, wherein said switched-capacitor circuit comprises first, second, and third capacitors, wherein a voltage across said first capacitor is to govern a voltage difference between a source and gate of said first transistor, wherein said second capacitor is to connect to said node to obtain charge for use in replenishing said first capacitor as needed to maintain a desired voltage across said third capacitor, and wherein said third capacitor is to replenish charge on said first capacitor.

15. The apparatus of claim 1 , further comprising an inductance to connect to said charge pump to recover at least some energy that would otherwise have been lost during redistribution of charge between said pump capacitors and to subsequently release said recovered energy back to said charge pump.

16. The apparatus of claim 1 , wherein said different arrangements are to interconnect said pump capacitors so as to form at least two charge-transfer paths that exist at different times during operation of said switching network.

17. The apparatus of claim 1 , further comprising a die, wherein said die comprises said first transistor and a first drive circuit to drive said first transistor.

18. The apparatus of claim 1 , further comprising a first die and a second die, wherein said transistors of said switching network are on said first die and said controller, said gate driver, additional gate drivers, and level shifters to operate said transistors are on said second die.

19. The apparatus of claim 1 , wherein said switching network comprises transistors that are disposed to selectively ground cathodes of said pump capacitors and transistors that are disposed to interconnect anodes of said pump capacitors.