Gallium nitride laminated substrate and semiconductor device
There is provided a gallium nitride laminated substrate including: an n-type gallium nitride layer containing an n-type impurity; a p-type gallium nitride layer provided on the n-type gallium nitride layer, containing a p-type impurity, forming a pn-junction at an interface with the n-type gallium nitride layer, and having a p-type impurity concentration and a thickness such that, when a reverse bias voltage is applied to the pn-junction, a breakdown occurs due to a punchthrough phenomenon before occurrence of a breakdown due to an avalanche phenomenon; and an intermediate level layer provided on the p-type gallium nitride layer, containing a p-type gallium nitride which contains the p-type impurity at a higher concentration than the p-type gallium nitride layer, having at least one or more intermediate levels between a valence band and a conduction band, and configured to suppress an overcurrent resulting from a breakdown due to the punchthrough phenomenon in the p-type gallium nitride layer.
1. A gallium nitride laminated substrate comprising:
an n-type gallium nitride layer containing an n-type impurity;
a p-type gallium nitride layer provided on the n-type gallium nitride layer, containing a p-type impurity, forming a pn-junction at an interface with the n-type gallium nitride layer, and having a p-type impurity concentration and a thickness such that, when a reverse bias voltage is applied to the pn-junction, a breakdown occurs due to a punchthrough phenomenon before occurrence of a breakdown due to an avalanche phenomenon; and
an intermediate level layer provided on the p-type gallium nitride layer, containing a p-type gallium nitride which contains the p-type impurity at a higher concentration than the p-type gallium nitride layer, having at least one or more intermediate levels between a valence band and a conduction hand, and configured to suppress an overcurrent resulting from a breakdown due to the punchthrough phenomenon in the p-type gallium nitride layer.
2. The gallium nitride laminated substrate according to claim 1 , wherein the p-type impurity concentration in the intermediate level layer is 5.0×10 19 cm −3 or more.
3. The gallium nitride laminated substrate according to claim 1 , wherein a thickness of the intermediate level layer is 5 nm or more and 50 nm or less.
4. The gallium nitride laminated substrate according to claim 1 ,
wherein an avalanche breakdown voltage is V A when the breakdown occurs due to the avalanche phenomenon, and a punchthrough breakdown voltage is V P when the breakdown occurs due to the punchthrough phenomenon, and in this case,
V A ≤V P is established when a temperature is lower than a predetermined threshold value, and the punchthrough phenomenon is induced due to the occurrence of the avalanche phenomenon, or the punchthrough phenomenon occurs simultaneously with the avalanche phenomenon, and
V A >V P is established when the temperature is a predetermined threshold value or more, and the punchthrough phenomenon occurs before the avalanche phenomenon, and therefore
the breakdown occurs due to the punchthrough phenomenon before the breakdown due to the avalanche phenomenon.
5. The gallium nitride laminated substrate according to claim 4 , wherein the punchthrough breakdown voltage is equal to or lower than twice the avalanche breakdown voltage.
6. The gallium nitride laminated substrate according to claim 4 , wherein the predetermined threshold is 110° C. or more and 130° C. or less.
7. The gallium nitride laminated substrate according to claim 1 , wherein the p-type impurity concentration in the p-type gallium nitride layer is 1.0×10 17 cm −3 or more and 1.0×10 18 cm −3 or less.
8. The gallium nitride laminated substrate according to claim 1 , wherein the p-type gallium nitride layer is configured such that a p-type impurity concentration becomes higher toward the intermediate level layer in the thickness direction.
9. The gallium nitride laminated substrate according to claim 1 , wherein a thickness of the p-type gallium nitride layer is 700 nm or less.
10. The gallium nitride laminated substrate according to claim 1 , wherein the intermediate level is formed by defects having been introduced into the gallium nitride by the p-type impurity.
11. The gallium nitride laminated substrate according to claim 1 , wherein the intermediate level layer is configured such that the defect forming the intermediate level is uniform in a plane.
12. A semiconductor device comprising:
an n-type gallium nitride layer containing an n-type impurity;
a p-type gallium nitride layer provided on the n-type gallium nitride layer, containing a p-type impurity, forming a pn-junction at an interface with the n-type gallium nitride layer, and having a p-type impurity concentration and a thickness such that, when a reverse bias voltage is applied to the pn-junction, a breakdown occurs due to a punchthrough phenomenon before occurrence of a breakdown due to an avalanche phenomenon; and
an intermediate level layer provided on the p-type gallium nitride layer, containing a p-type gallium nitride which contains the p-type impurity at a higher concentration than the p-type gallium nitride layer, having at least one or more intermediate levels between a valence band and a conduction band, and configured to suppress an overcurrent resulting from a breakdown due to the punchthrough phenomenon in the p-type gallium nitride layer.
13. The semiconductor device according to claim 12 , wherein the semiconductor has a durability that prevents an electrical breakdown from occurring even if the reverse bias voltage which causes a breakdown is repeatedly applied, wherein the breakdown means a case where a current with a current value of 1 μA or more is generated by applying a reverse bias voltage to the pn-junction.