Multi-photo pixel cell having vertical gate structure

1. An apparatus comprising:

a semiconductor substrate including:

a front side surface;

a first photodiode configured to generate a first charge;

a second photodiode configured to generate a second charge;

a barrier layer between the first photodiode and the second photodiode and configured to control flow of the second charge from the second photodiode to the first photodiode, wherein the first photodiode, the barrier layer, and the second photodiode form a stack along an axis perpendicular to the front side surface; and

a floating drain to store the first charge or the second charge; one or more gates including:

a first gate portion on the front side surface over a channel region between the first photodiode and the floating drain; and

a second gate portion extending from the front side surface through the first photodiode and having an end portion that terminates at or above the barrier layer along the axis,

wherein the first gate portion is configured to conduct a first signal to control a flow of the first charge from the first photodiode to the floating drain via the channel region, and

wherein the second gate portion is configured to conduct a second signal to control the barrier layer to control a flow of the second charge.

2. The apparatus of claim 1 , further comprising a controller configured to:

transmit the first signal via the first gate portion to transfer the first charge from the first photodiode to the floating drain via the channel region for read out;

transmit the second signal via the second gate portion to transfer the second charge from the second photodiode to the first photodiode via the barrier layer; and

transmit the first signal via the first gate portion to transfer the second charge from the second photodiode to the floating drain via the channel region for read out.

3. The apparatus of claim 2 , wherein the semiconductor substrate is a first semiconductor substrate; and

wherein the apparatus further includes a second semiconductor substrate; and

wherein the controller is part of the second semiconductor substrate.

4. The apparatus of claim 1 , wherein:

the semiconductor substrate includes a back side surface opposite to the front side surface configured as a light receiving surface;

the first photodiode is configured to convert a first component of light within an infra-red light wavelength range to the first charge; and

the second photodiode is configured to convert a second component of light within a visible light wavelength range to the second charge.

5. The apparatus of claim 1 , wherein:

the front side surface is configured as a light receiving surface;

the first photodiode is configured to convert a first component of light within a visible light wavelength range to the first charge; and

the second photodiode is configured to convert a second component of light within an infra-red light wavelength range to the second charge.

6. The apparatus of claim 1 , wherein the semiconductor substrate includes a P-well forming a sidewall on four sides of the stack of the first photodiode, the barrier layer, and the second photodiode; and

wherein the second gate portion extends along a center line through the first photodiode, the center line being of equal distance from at least two of the sidewalls formed by the P-well.

7. The apparatus of claim 1 , further comprising:

an oxide layer between the second gate portion and the first photodiode; and

an interface passivation region (IPR) between the oxide layer and the first photodiode.

8. The apparatus of claim 7 , wherein the IPR and the barrier layer are configured to have provide an electrical potential gradient from the second photodiode to the first photodiode.

9. The apparatus of claim 8 , wherein the IPR and the barrier layer have different doping profiles to provide the electrical potential gradient.

10. The apparatus of claim 8 , wherein the second gate portion is doped with dopants having a doping concentration gradient along the axis to introduce the electrical potential gradient.

11. The apparatus of claim 1 , wherein:

the second photodiode is biased at a first voltage;

the barrier layer is biased at a second voltage by a signal at the second gate portion;

the first photodiode is biased at a third voltage;

the channel region is biased at a fourth voltage by a signal at the first gate portion; and

the first voltage, the second voltage, the third voltage, and the fourth voltage form an electrical potential gradient from the second photodiode to the channel region to enable the second charge to flow following the electrical potential gradient.

12. The apparatus of claim 1 , further comprising a guard ring structure that shields the end portion of the second gate portion from the barrier layer.

13. The apparatus of claim 1 , wherein the second gate portion has non-uniform cross-sectional areas.

14. The apparatus of claim 13 , wherein the second gate portion has a wedge shape and includes a tilted sidewall that tilts towards a light receiving surface.

15. The apparatus of claim 14 , wherein the semiconductor substrate further includes a deep trench isolation (DTI) structure that extend along the axis;

wherein at least a part of the first photodiode is between the DTI structure and the tilted sidewall of the second gate portion;

wherein the tilted sidewall also tilts towards the DTI structure and configured to reflect light towards the DTI structure and through the at least a part of the first photodiode; and

wherein the DTI structure is configured reflect light towards the tilted sidewall and through the at least a part of the first photodiode.

16. The apparatus of claim 1 , wherein the one or more gates comprise a first gate comprising the first gate portion and a second gate comprising the second gate portion; and

wherein the first gate and the second gate are electrically insulated from each other.

17. The apparatus of claim 1 , wherein the one or more gates comprise a merged gate comprising the first gate portion and the second gate portion electrically connected to each other.

18. The apparatus of claim 17 , further comprising a controller configured to:

transmit the first signal via the first gate portion to transfer the first charge from the first photodiode to the floating drain via the channel region for read out;

transmit the second signal via the second gate portion to:

transfer the second charge from the second photodiode to the first photodiode via the barrier layer; and

transfer the second charge from the second photodiode to the floating drain via the channel region for read out,

wherein the first signal is insufficient to cause the second charge to flow from the second photodiode to the first photodiode via the barrier layer.

19. The apparatus of claim 1 , further comprising an oxide layer that shields the end portion of the second gate portion from the barrier layer.

20. The apparatus of claim 19 , wherein the oxide layer also shields the second gate portion from the first photodiode.

21. The apparatus of claim 19 , wherein at least one of: the end portion of the second gate portion, or a portion of the oxide layer that shields the end portion from the barrier layer, protrude into and terminate at the barrier layer.

22. The apparatus of claim 19 , wherein both the end portion of the second gate portion and a portion of the oxide layer that shields the end portion from the barrier layer terminate above the barrier layer along the axis.

23. A method comprising:

transmitting, via a first gate portion of one or more gates, a first signal to transfer a first charge from a first photodiode to a floating drain via a channel region between the first photodiode and the floating drain for read out, wherein the first gate portion is formed on a front side surface of a semiconductor substrate, the semiconductor substrate further including the floating drain, the first photodiode to generate the first charge, a second photodiode to generate a second charge, a barrier layer between the first photodiode and the second photodiode, the first photodiode, the barrier layer, and the second photodiode forming a stack along an axis perpendicular to the front side surface;

quantizing the first charge in the floating drain to measure an intensity of light of a first wavelength range;

transmitting a second signal via a second gate portion of the one or more gates to transfer the second charge from the second photodiode to the first photodiode via the barrier layer, wherein the second gate portion extends from the front side surface through the first photodiode and has an end portion that terminates at or above the barrier layer along the axis;

transmitting the first signal via the first gate portion to transfer the second charge from the first photodiode to the floating drain via the channel region; and

quantizing the second charge in the floating drain to measure an intensity of light of a second wavelength range.

24. The method of claim 23 , wherein the first wavelength range corresponds to a wavelength range of infra-red light, and wherein the second wavelength range corresponds to a wavelength range of visible light.