Operating a quantum processor having a three-dimensional device topology
In a general aspect, three-dimensional integrated multilayer architectures for qubit devices organized in quantum processors are described herein. In some aspects, a quantum processor includes devices residing in multiple physical layers. The quantum processor also includes connections that interconnect the devices in a tree structure topology. A computational state is encoded in child qubit devices in a first layer of the tree structure topology. A quantum control sequence is applied to at least one of the devices to transform the computational state. Applying the quantum control sequence includes using one or more parent qubit devices in a second layer of the tree structure topology to mediate between child qubit devices in the first layer of the tree structure topology. A readout of the transformed computational state may be performed.
1. A quantum computing method comprising:
encoding a computational state in a quantum processor, wherein the quantum processor comprises:
a plurality of devices residing in a plurality of physical layers; and
connections that interconnect the plurality of devices in a tree structure topology, wherein the computational state is encoded in child qubit devices in a first layer of the tree structure topology;
applying a quantum control sequence to at least one of the plurality of devices to transform the computational state in the quantum processor, wherein applying the quantum control sequence comprises using one or more parent qubit devices in a second layer of the tree structure topology to mediate between child qubit devices in the first layer of the tree structure topology; and
performing a readout of the transformed computational state.
2. The quantum computing method of claim 1 , wherein encoding the computational state in the child qubit devices comprises encoding the computational state in a plurality of logical qubits.
3. The quantum computing method of claim 2 , wherein at least one of the logical qubits is defined by multiple child qubit devices.
4. The quantum computing method of claim 2 , wherein at least one of the logical qubits is defined by at least one child qubit device and at least one parent qubit device.
5. The quantum computing method of claim 1 , wherein performing the readout comprises operating readout devices associated with the respective child qubit devices.
6. The quantum computing method of claim 1 , wherein performing the readout comprises performing a partial readout of the transformed computational state.
7. The quantum computing method of claim 1 , wherein applying the quantum control sequence comprises operating a resonator bus associated with the second layer of the tree structure topology to provide an interaction between child qubit devices in the first layer of the tree structure topology.
8. The quantum computing method of claim 7 , wherein applying the quantum control sequence comprises using the resonator bus to mediate two-qubit entangling gates between multiple pairs of child qubit devices simultaneously.
9. The quantum computing method of claim 1 , wherein the child qubit devices in the first layer of the tree structure topology reside in a first physical layer of the quantum processor, and the parent qubit devices in the second layer of the tree structure topology reside in a second physical layer of the quantum processor.
10. The quantum computing method of claim 1 , wherein applying the quantum control sequence comprises operating a resonator bus in a root layer of the tree structure topology.
11. The quantum computing method of claim 1 , wherein applying the quantum control sequence comprises using direct connections between pairs of the child qubit devices.
12. The quantum computing method of claim 1 , wherein applying the quantum control sequence comprises transferring one or more qubit states between devices in different layers of the tree structure topology.
13. A quantum computing system comprising:
a quantum processor comprising:
a plurality of devices residing in a plurality of physical layers of the quantum processor;
connections that interconnect the plurality of devices in a tree structure topology, wherein the tree structure topology comprises:
clusters of child qubit devices in a first layer of the tree structure topology; and
parent qubit devices in a second layer of the tree structure topology, each parent qubit device in the second layer being connected to a respective one of the clusters of child qubit devices in the first layer; and
a control system communicably coupled to the quantum processor and configured to operate the plurality of devices.
14. The quantum computing system of claim 13 , wherein the quantum processor comprises readout devices associated with the respective child qubit devices in the first layer of the tree structure topology.
15. The quantum computing system of claim 13 , wherein the quantum processor comprises resonator buses associated with the respective parent qubit devices in the second layer of the tree structure topology.
16. The quantum computing system of claim 13 , wherein the child qubit devices in the first layer of the tree structure topology reside in a first physical layer of the quantum processor, and the parent qubit devices in the second layer of the tree structure topology reside in a second physical layer of the quantum processor.
17. The quantum computing system of claim 13 , wherein the tree structure topology comprises a resonator bus in a root layer of the tree structure topology.
18. The quantum computing system of claim 13 , wherein the child qubit devices in the first layer of the tree structure topology are fixed-frequency qubit devices, and the parent qubit devices in the second layer of the tree structure topology are tunable-frequency qubit devices.
19. The quantum computing system of claim 13 , further comprising direct connections between pairs of the child qubit devices within each cluster of child qubit devices.
20. The quantum computing system of claim 13 , wherein the tree structure topology comprises a binary tree structure topology having a branching factor equal to two.
21. The quantum computing system of claim 13 , wherein the tree structure topology has a branching factor greater than two.