System and method for port reduction using multiple chassis link aggregation group for stacked devices
A system includes servers that are connected in series, and a top of rack (TOR) switch having a first TOR switch port and a second TOR switch port that are connected to a first end and a second end, respectively, of the series connected servers. A multi chassis link aggregation group may be established on the first TOR switch port and the second TOR switch port to transform the series connected servers into a single logical channel. A highest media access control address is determined from the servers to represent the single logical channel.
1. A server system, comprising:
a plurality of servers that are connected in series; and
a top of rack (TOR) switch including a first TOR switch port and a second TOR switch port that are connected to a first end and a second end, respectively, of the series connected servers, wherein a multi chassis link aggregation group (MCLAG) is established on the first TOR switch port and the second TOR switch port to transform the series connected servers into a single logical channel, wherein a highest media access control (MAC) address is determined from the servers to represent the single logical channel, wherein the servers include respective network identification card (NIC) microcontrollers configured to exchange protocol messages to determine the server with the highest MAC address, wherein the NIC microcontroller receives a forwarded MAC address, determines a higher MAC address between the received forwarded MAC address and the MAC address of the receiving server, and forwards the determined higher MAC address to an adjacent server.
2. The server system of claim 1 , wherein the establishing of the MCLAG includes blocking of a data packet that passes between the first TOR switch port and the second TOR switch port.
3. The server system of claim 1 , wherein the NIC microcontrollers determine the highest MAC address within a discovery period.
4. The server system of claim 1 , wherein the receiving and forwarding of the same MAC address by the adjacent server for a predetermined iteration threshold indicates the establishment of the MCLAG.
5. The server system of claim 1 , wherein a bandwidth of the TOR switch ports is equal to the bandwidth of each connecting link in the series connected servers.
6. The server system of claim 1 , wherein the established MCLAG is set aside when a connecting link in the series connected servers is broken.
7. The server system of claim 1 , wherein a data packet passes between the first TOR switch port and the second TOR switch port when the MCLAG is set aside.
8. The server system of claim 7 , wherein the MCLAG is reestablished upon fixing of the broken connecting link.
9. A method comprising:
connecting a plurality of servers in series;
connecting a first top of rack (TOR) switch port and a second TOR switch port to a first end and a second end, respectively, of the series connected servers;
establishing, by a TOR switch, a multi chassis link aggregation group (MCLAG) on the first and second TOR switch ports, wherein the established MCLAG transforms the series connected servers into a single logical channel, wherein a highest media access control (MAC) address is determined from the servers to represent the single logical channel;
setting aside the established MCLAG when a connecting link in the series connected servers is broken; and
reestablishing the MCLAG upon fixing of the broken connecting link.
10. The method of claim 9 , wherein the establishing of the MCLAG includes blocking of a data packet that passes between the first TOR switch port and the second TOR switch port.
11. The method of claim 9 , wherein the servers include respective network identification card (NIC) microcontrollers configured to exchange protocol messages to determine the server with the highest MAC address.
12. The method of claim 11 , wherein the NIC microcontrollers determine the highest MAC address within a discovery period.
13. The method of claim 9 , wherein a bandwidth of the TOR switch ports is equal to the bandwidth of each connecting link in the series connected servers.
14. The method of claim 9 , further including load balancing through use of a hash algorithm to select the TOR switch port that facilitates receiving of external data packets.
15. A method comprising:
connecting a plurality of servers in series;
connecting a first top of rack (TOR) switch port and a second TOR switch port to a first end and a second end, respectively, of the series connected servers; and
establishing, by a TOR switch, a multi chassis link aggregation group (MCLAG) on the first and second TOR switch ports, wherein the established MCLAG transforms the series connected servers into a single logical channel, wherein a network identification card (NIC) microcontroller of a server receives a forwarded MAC address, determines a higher MAC address between the received forwarded MAC address and the MAC address of the receiving server, and forwards the determined higher MAC address to an adjacent server, wherein a highest media access control (MAC) address is determined from the servers to represent the single logical channel, wherein the MCLAG is set aside when one connecting link in the series connected servers is broken.
16. The method of claim 15 , wherein the establishing of the MCLAG includes blocking of a data packet that passes between the first TOR switch port and the second TOR switch port.
17. The method of claim 15 , wherein the servers include respective network identification card (NIC) microcontrollers configured to determine the server with the highest MAC address by exchanging protocol messages.
18. The method of claim 15 , wherein the first TOR switch port is treated as a separate port from the second TOR switch port when the MCLAG is set aside.