Information handling system to allow system boot when an amount of installed memory exceeds processor limit
An information handling system includes a processor, a plurality of dual in-line memory modules (DIMMs), and a basic input/output system (BIOS). During a power-on self-test (POST), the BIOS may read serial presence detect data from each of the DIMMs, determine a total amount of installed memory. The BIOS may determine whether the total amount of the installed memory exceeds a maximum memory capacity of the processor. If so, the BIOS may remove memory capacity of the DIMMs to create a second total amount of the installed memory that is less than the maximum memory capacity of the processor, configure a memory address decode register with the second total amount of the installed memory, and complete the POST.
1. A method comprising:
during a power-on self-test (POST) of an information handling system:
reading, by a basic input/output system, serial presence detect (SPD) data from each of a plurality of dual in-line memory modules (DIMMs) installed to communicate with a processor of the information handling system;
determining a first total amount of installed memory based on the SPD data;
determining whether the first total amount of the installed memory exceeds a maximum memory capacity of the processor; and
in response to the first total amount of the installed memory exceeding the maximum memory capacity of the processor, removing memory capacity of the DIMMs to create a second total amount of the installed memory that is less than the maximum memory capacity of the processor; and
completing the POST.
2. The method of claim 1 , wherein removing memory capacity of the DIMMs to create the second total amount of the installed memory that is less than the maximum memory capacity comprises:
disabling at least one DIMM of the DIMMs to remove an entire amount of memory for the at least one DIMM from the first total amount of the installed memory to create the second total amount of the installed memory.
3. The method of claim 2 , further comprising:
saving information associated with the disabled at least one DIMM.
4. The method of claim 1 , further comprising:
prior to completing the POST:
saving error information indicating an amount of the first total amount of the installed memory that exceeds the maximum memory capacity.
5. The method of claim 1 , further comprising:
providing a warning message on a display device of the information handling system, the warning message indicating that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
6. The method of claim 1 , further comprising:
logging a warning message to a memory of the information handling system, the warning message to indicate that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
7. An information handling system comprising:
a processor;
a plurality of dual in-line memory modules (DIMMs) installed to communicate with the processor, the DIMMs to provide memory for access by the processor; and
a basic input/output system (BIOS) to communicate with the DIMMs and the processor, and during a power-on self-test (POST) the BIOS to: read serial presence detect (SPD) data from each of the DIMMs; determine a total amount of installed memory based on the SPD data; determine whether the total amount of the installed memory exceeds a maximum memory capacity of the processor; in response to the total amount of the installed memory exceeding the maximum memory capacity of the processor, to remove memory capacity of the DIMMs to create a second total amount of the installed memory that is less than the maximum memory capacity of the processor; to perform a configuration of a memory address decode register with the second total amount of the installed memory; and to complete the POST.
8. The information handling system of claim 7 , wherein the BIOS to disable at least one DIMM of the DIMMs to remove an entire amount of memory for the at least one DIMM from the first total amount of the installed memory to create the second total amount of the installed memory.
9. The information handling system of claim 8 , further comprising:
a local cache of the processor; and
the BIOS to save information associated with the disabled at least one DIMM to the local cache.
10. The information handling system of claim 7 , further comprising:
a local cache of the processor; and
prior to completing the POST, the BIOS to save error information indicating an amount of the first total amount of the installed memory that exceeds the maximum memory capacity to the local cache.
11. The information handling system of claim 7 , the BIOS further to provide a warning message on a display device of the information handling system, the warning message to indicate that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
12. The information handling system of claim 7 , the BIOS further to log a warning message to a memory of the information handling system, the warning message to indicate that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
13. The information handling system of claim 7 , wherein the configuration the memory address decode register for the installed memory based on memory reference code within the BIOS.
14. A method comprising:
during a power-on self-test (POST) of an information handling system:
reading, by a basic input/output system (BIOS), serial presence detect (SPD) data from each of a plurality of dual in-line memory modules (DIMMs) installed to communicate with a processor of the information handling system;
determining a first total amount of installed memory based on the SPD data;
determining whether the first total amount of the installed memory exceeds a maximum memory capacity of the processor;
in response to the first total amount of the installed memory not exceeding the maximum memory capacity of the processor, configuring a memory address decode register with the first total amount of the installed memory; and
in response to the first total amount of the installed memory exceeding the maximum memory capacity of the processor:
removing memory capacity of the DIMMs to create a second total amount of the installed memory less than the maximum memory capacity of the processor; and
configuring the memory address decode register with the second total amount of the installed memory; and
completing the POST.
15. The method of claim 14 , wherein removing memory capacity of the DIMMs to create the second total amount of the installed memory that is less than the maximum memory capacity comprises:
disabling at least one DIMM of the DIMMs to remove an entire amount of memory for the at least one DIMM from the first total amount of the installed memory to create the second total amount of the installed memory.
16. The method of claim 14 , further comprising:
saving information associated with the disabled at least one DIMM.
17. The method of claim 14 , further comprising:
prior completing the POST:
saving error information indicating an amount of the first total amount of the installed memory that exceeds the maximum memory capacity.
18. The method of claim 14 , further comprising:
providing a warning message on a display device of the information handling system, the warning message indicating that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
19. The method of claim 14 , further comprising:
logging a warning message to a memory of the information handling system, the warning message to indicate that at least one of the DIMMs installed within the information handling system is disabled due to the first total amount of the installed memory exceeding the maximum memory capacity of the processor.
20. The method of claim 14 , wherein the configuring of the memory address decode register for the installed memory is performed by memory reference code within the BIOS.