System and method to prevent endless machine check error of persistent memory devices
An information handling system includes a plurality of persistent memory devices and a basic input/output system (BIOS). The BIOS begins a power-on self-test (POST) of the information handling system. During the POST, the BIOS may call a block input/output (I/O) driver to access a memory region within the first persistent memory device. The access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device. The BIOS may determine whether blocks of the memory region contain bad memory locations. In response to the memory region containing bad memory locations, the BIOS may return a device error message without performing the access of the blocks of the memory region within the first persistent memory device and may boot to an operating system of the information handling system via another bootable device.
1. A method comprising:
calling, by a basic input/output system (BIOS) of an information handling system, a block input/output (I/O) driver to access a memory region within a first persistent memory device of the information handling system, wherein the access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device;
determining, by the block I/O driver, whether blocks of the memory region within the first persistent memory device contain bad memory locations; and
in response to the memory region within the first persistent memory device containing bad memory locations:
returning a device error message without performing the access of the blocks of the memory region within the first persistent memory device, wherein not performing the access of the blocks of the memory region prevents a machine check error from occurring in the information handling system; and
booting to an operating system of the information handling system via another bootable device.
2. The method of claim 1 , wherein booting to the operating system of the information handling system via the another bootable device comprises:
calling, by the BIOS, the block I/O driver to access a memory region within a second persistent memory device of the information handling system, wherein the access of the memory region within the second persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device;
determining, by the block I/O driver, whether blocks of the memory region within the second persistent memory device contain bad memory locations; and
in response to the memory region within the second persistent memory device not containing bad memory locations, booting to the operating system via the memory region of the second persistent memory device.
3. The method of claim 1 , further comprising:
performing address range scrubbing of a plurality of persistent memory devices including the first persistent memory device; and
maintaining a list of uncorrectable memory locations of the persistent memory devices based on the performing of the address range scrubbing.
4. The method of claim 3 , further comprising:
calling, by the operating system, a distributed shared memory to retrieve the list of uncorrectable memory locations of the persistent memory devices;
storing data within memory locations of the first persistent memory device not listed within the list of uncorrectable memory locations of the persistent memory devices.
5. The method of claim 3 , wherein the determining of whether the blocks of the memory region within the first persistent memory device contain bad memory locations comprises:
retrieving, by the block I/O driver, the list of uncorrectable memory locations of the persistent memory devices; and
comparing the blocks of the memory region within the first persistent memory device to memory locations included in the list of uncorrectable memory locations of the persistent memory devices.
6. The method of claim 5 , further comprising:
publishing an address range scrubbing bad list protocol including the list of uncorrectable memory locations of the persistent memory devices.
7. The method of claim 6 , wherein the retrieving of the list of uncorrectable memory locations of the persistent memory devices comprises:
calling, by the block I/O driver, the address range scrubbing bad list protocol.
8. The method of claim 1 , wherein the accessing of the memory region of the first persistent memory device includes reading or writing to the memory region of the first persistent memory device.
9. An information handling system comprising:
a plurality of persistent memory devices including first and second persistent memory devices; and
a basic input/output system (BIOS) that during a power-on self-test (POST) of the information handling system: calls a block input/output (I/O) driver to access a memory region within the first persistent memory device, wherein the access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device; determines whether blocks of the memory region within the first persistent memory device contain bad memory locations; and in response to the memory region within the first persistent memory device containing bad memory locations, returns a device error message without performing the access of the blocks of the memory region within the first persistent memory device, wherein not performing the access of the blocks of the memory region prevents a machine check error from occurring in the information handling system, and boots to an operating system of the information handling system via another bootable device.
10. The information handling system of claim 9 , wherein during the boot to the operating system of the information handling system via the another bootable device, the BIOS further: calls the block I/O driver to access a memory region within the second persistent memory device, wherein the access of the memory region within the second persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device; determines whether blocks of the memory region within the second persistent memory device contain bad memory locations; and in response to the memory region within the second persistent memory device not containing bad memory locations, boots to the operating system via the memory region of the second persistent memory device.
11. The information handling system of claim 10 , the BIOS further performs address range scrubbing of a plurality of persistent memory devices including the first persistent memory device, and maintains a list of uncorrectable memory locations of the persistent memory devices based on the performance of the address range scrubbing.
12. The information handling system of claim 11 , further comprising:
an operating system that calls a distributed shared memory to retrieve the list of uncorrectable memory locations of the persistent memory devices, and stores data within memory locations of the first persistent memory device not listed within the list of uncorrectable memory locations of the persistent memory devices.
13. The information handling system of claim 11 , wherein the determination of whether the blocks of the memory region within the first persistent memory device contain bad memory locations comprises:
the BIOS further retrieves the list of uncorrectable memory locations of the persistent memory devices, and compares the blocks of the memory region within the first persistent memory device to memory locations included in the list of uncorrectable memory locations of the persistent memory devices.
14. The information handling system of claim 13 , the BIOS further publishes an address range scrubbing bad list protocol including the list of uncorrectable memory locations of the persistent memory devices.
15. The information handling system of claim 14 , wherein the retrieval of the list of uncorrectable memory locations of the persistent memory devices comprises: the BIOS calls the address range scrubbing bad list protocol.
16. The information handling system of claim 9 , wherein the access of the memory region of the first persistent memory device includes reading or writing to the memory region of the first persistent memory device.
17. A method comprising:
during a driver execution environment phase of a power-on self-test (POST):
performing address range scrubbing of a plurality of persistent memory devices including a first persistent memory device; and
maintaining a list of uncorrectable memory locations of the persistent memory devices based on the performing of the address range scrubbing;
calling, by a basic input/output system (BIOS) of an information handling system, a block input/output (I/O) driver to access a memory region within the first persistent memory device, wherein the access of the memory region within the first persistent memory device is to determine whether the first persistent memory device is a bootable persistent memory device;
comparing the blocks of the memory region within the first persistent memory device to memory locations included in the list of uncorrectable memory locations of the persistent memory devices;
based on the comparison, determining whether blocks of the memory region within the first persistent memory device contain bad memory locations;
in response to the memory region within the first persistent memory device not containing bad memory locations, booting to an operating system via the memory region within the first persistent memory device; and
in response to the memory region within the first persistent memory device containing bad memory locations:
returning a device error message without performing the access of the blocks of the memory region within the first persistent memory device; and
booting to the operating system of the information handling system via another bootable device.
18. The method of claim 17 , further comprising:
calling, by the operating system, a distributed shared memory to retrieve the list of uncorrectable memory locations of the persistent memory devices;
storing data within memory locations of the first persistent memory device not listed within the list of uncorrectable memory locations of the persistent memory devices.
19. The method of claim 17 , further comprising:
during the driver execution environment phase of the POST:
publishing an address range scrubbing bad list protocol including the list of uncorrectable memory locations of the persistent memory devices.
20. The method of claim 17 , wherein the accessing of the memory region of the first persistent memory device includes reading or writing to the memory region of the first persistent memory device.