IP Library Granted Patent US 10,990,560
Granted Patent B2
US 10,990,560 · App. 16/415,116 · Granted Apr 27, 2021

USB type-C sideband signal interface circuit

Inventors: Arun Khamesra (Bangalore, IN); Anup Nayak (Fremont, CA); Partha Mondal (Paschim Medinipur, IN); Hemant Prakash Vispute (Bangalore, IN); Ravi Konduru (Bengaluru, IN)
Assignee: Cypress Semiconductor Corporation
G06F13/4282G06F13/362G06F13/385G06F13/4068
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Quick Facts
Patent No.
US 10,990,560
App. No.
16/415,116
Granted
Apr 27, 2021
Kind
B2
Abstract

A USB-C controller, disposed on an integrated circuit (IC), comprises a first pair of terminals to communicate with a first communication protocol that is other than USB, a second pair of terminals to communicate with a second communication protocol that is other than USB, and a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a Type-C receptacle. The USB-C controller further includes: a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals: and logic to control the multiplexer according to a mode enabled within a configuration channel (CC) signal.

Claims (39)

1. A Universal Serial Bus Type-C (USB-C) controller comprising:

a first pair of terminals to communicate over a first communication protocol that is other than a Universal Serial Bus (USB) protocol;

a second pair of terminals to communicate over a second communication protocol that is other than the USB protocol;

a third pair of terminals, each of which is to be coupled to a corresponding SBU1 terminal or SBU2 terminal of a Type-C receptacle;

a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals, wherein the multiplexer comprises a first set of four low-voltage (LV) transistors to selectively couple each terminal of the first pair of terminals to one of the third pair of terminals; and

first logic to control gates of each of the first set of four LV transistors according to a mode enabled within a configuration channel (CC) signal;

wherein the USB-C controller is disposed on an integrated circuit (IC).

2. The USB-C controller of claim 1 , wherein the multiplexer further comprises a second set of four LV transistors to selectively couple each terminal of the second pair of terminals to the third pair of terminals.

3. The USB-C controller of claim 1 , wherein at least one of the first communication protocol and the second communication protocol is one of a DisplayPort (DP) protocol, a high-definition multimedia interface (HDMI) protocol, a Thunderbolt® (TBT) protocol, a mobile high-definition link (MHL) protocol, and a Peripheral Component Interconnect Express (PCIe) protocol.

4. The USB-C controller of claim 1 , further comprising a series of cascaded LV transistors coupled between the multiplexer and each terminal of the third pair of terminals.

5. The USB-C controller of claim 4 , wherein the series of cascaded LV transistors comprises five-volt LV transistors.

6. The USB-C controller of claim 1 , wherein the USB-C controller is configured to provide at least 20 volts of short-circuit protection on the third pair of terminals.

7. The USB-C controller of claim 1 , wherein the first pair of terminals comprises a LSTX control terminal and a LSRX control terminal of a Thunderbolt® (TBT) protocol.

8. The USB-C controller of claim 1 , wherein the second pair of terminals comprises a positive auxiliary control terminal and a negative auxiliary control terminal of a DisplayPort (DP) protocol.

9. The USB-C controller of claim 1 , wherein the USB-C controller is further configured to provide flip correction in response to the CC signal, when the first pair of terminals or the second pair of terminals is coupled to the third pair of terminals.

10. The USB-C controller of claim 1 , wherein the USB-C controller further comprises at least one of:

a 20V IEC RC snapback clamp coupled between each of the third pair of terminals and ground; and

a human body model (HBM) snapback clamp coupled between each of the first pair of terminals and ground.

11. A system comprising:

a first host controller to communicate over a first communication protocol that is other than a Universal Serial Bus (USB) protocol;

a second host controller to communicate over a second communication protocol that is other than the USB protocol;

a USB Type-C receptacle; and

a USB Type-C (USB-C) controller disposed on an integrated circuit (IC), the USB-C controller comprising:

a first pair of terminals coupled to the first host controller;

a second pair of terminals coupled to the second host controller;

a third pair of terminals, each of which is coupled to a corresponding SBU1 terminal or SBU2 terminal of the USB Type-C receptacle;

a multiplexer to selectively couple the first pair of terminals to the third pair of terminals and the second pair of terminals to the third pair of terminals, wherein the multiplexer comprises a first set of four low-voltage (LV) transistors to selectively couple each terminal of the first pair of terminals to one of the third pair of terminals; and

first logic to control gates of each of the first set of four LV transistors according to a mode enabled within a configuration channel (CC) signal.

12. The system of claim 11 , wherein the multiplexer further comprises a second set of four LV transistors to selectively couple each terminal of the second pair of terminals to the third pair of terminals.

13. The system of claim 11 , wherein at least one of the first communication protocol and the second communication protocol is one of a DisplayPort (DP) protocol, a high-definition multimedia interface (HDMI) protocol, a Thunderbolt® (TBT) protocol, a mobile high-definition link (MHL) protocol, and a Peripheral Component Interconnect Express (PCIe) protocol.

14. The system of claim 11 , further comprising a series of cascaded LV transistors coupled between the multiplexer and each terminal of the third pair of terminals.

15. The system of claim 14 , wherein the series of cascaded LV transistors comprises five-volt LV transistors.

16. The system of claim 11 , wherein the USB-C controller is configured to provide at least 20 volts of short-circuit protection on the third pair of terminals.

17. The system of claim 11 , wherein the first pair of terminals comprises a LSTX control terminal and a LSRX control terminal of a Thunderbolt® (TBT) protocol.

18. The system of claim 11 , wherein the second pair of terminals comprises a positive auxiliary control terminal and a negative auxiliary control terminal of a DisplayPort (DP) protocol.

19. The system of claim 11 , wherein the USB-C controller is further configured to provide flip correction in response to the CC signal, when the first pair of terminals or the second pair of terminals is coupled to the third pair of terminals.

20. The system of claim 11 , wherein the USB-C controller further comprises at least one of:

a 20V IEC RC snapback clamp coupled between each of the third pair of terminals and ground; and

a human body model (HBM) snapback clamp coupled between each of the first pair of terminals and ground.

Assignments (4)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
SECURITY INTEREST Recorded Jul 31, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MUFG UNION BANK, N.A.
Reel/Frame 049917/0093 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2019
From: KHAMESRA, ARUN; NAYAK, ANUP; MONDAL, PARTHA; VISPUTE, HEMANT PRAKASH; KONDURU, RAVI
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 049241/0714 →
Continuity (3)
Continuation 16000733 · Jun 5, 2018
Provisional Application 62656284 · Apr 11, 2018
Related Publication 20190391950A1 · Dec 26, 2019