Memory cells and arrays of elevationally-extending strings of memory cells
A memory cell comprises channel material, insulative charge-passage material, programmable material, a control gate, and charge-blocking material between the programmable material and the control gate. The charge-blocking material comprises a non-ferroelectric insulator material and a ferroelectric insulator material comprising hafnium, zirconium, and oxygen. Other embodiments are disclosed.
1. A memory cell comprising:
channel material;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen; and
metal material between the non-ferroelectric insulator material and the ferroelectric insulator material, the metal material being between the non-ferroelectric insulator material and the ferroelectric insulator material to everywhere preclude the non-ferroelectric insulator material and the ferroelectric insulator material from physically contacting each another.
2. A plurality of memory cells, the memory cells individually comprising:
a pair of source/drain regions having channel material extending there-between, the pair of source/drain regions and the channel material defining a current flow path that extends from one edge of one of the pair of source/drain regions through the channel material to one edge of the other of the pair of source/drain regions;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen; and
the ferroelectric insulator material is discontinuous parallel the current flow path in the channel material, the non-ferroelectric insulator material is continuous parallel the current flow path in the channel material.
3. A memory cell comprising:
channel material;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material; and
metal material between the non-ferroelectric insulator material and the ferroelectric insulator material, the metal material being between the non-ferroelectric insulator material and the ferroelectric insulator material to everywhere preclude the non-ferroelectric insulator material and the ferroelectric insulator material from physically contacting each another.
4. A memory cell comprising:
channel material extending vertically or within 10° of vertical;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material;
metal material between the non-ferroelectric insulator material and the ferroelectric insulator material, the metal material being between the non-ferroelectric insulator material and the ferroelectric insulator material to everywhere preclude the non-ferroelectric insulator material and the ferroelectric insulator material from physically contacting each another; and
the ferroelectric insulator material being thinner than the non-ferroelectric insulator material.
5. An array of elevationally-extending strings of memory cells, comprising:
a stack comprising vertically-alternating insulative tiers and conductive tiers, the conductive tiers comprising control-gate material having terminal ends corresponding to control-gate regions of individual memory cells,
programmable material of the individual memory cells extending elevationally along individual of the control-gate regions;
charge-blocking material of the individual memory cells extending elevationally along the individual control-gate regions between the programmable material and the individual control-gate regions, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material; and
metal material between the non-ferroelectric insulator material and the ferroelectric insulator material, the metal material being between the non-ferroelectric insulator material and the ferroelectric insulator material to everywhere preclude the non-ferroelectric insulator material and the ferroelectric insulator material from physically contacting each another;
transistor channel material of the individual memory cells extending elevationally along the programmable material; and
insulative charge-passage material extending elevationally along the programmable material between the transistor channel material and the programmable material.
6. A memory cell comprising:
channel material;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen; and
the ferroelectric insulator material is discontinuous between edges of the control gate parallel a straight-line direction of current flow in the channel material; and
metal material between the non-ferroelectric insulator material and the discontinuous ferroelectric insulator material, the metal material being between the non-ferroelectric insulator material and the ferroelectric insulator material to everywhere preclude the non-ferroelectric insulator material and the discontinuous ferroelectric insulator material from physically contacting each another.
7. A plurality of memory cells, the memory cells individually comprising:
a pair of source/drain regions having channel material extending there-between, the pair of source/drain regions and the channel material defining a current flow path that extends from one edge of one of the pair of source/drain regions through the channel material to one edge of the other of the pair of source/drain regions, the current flow path being entirely straight between the one edges of the pair of source/drain regions;
insulative charge-passage material;
programmable material;
a control gate; and
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen; and
the ferroelectric insulator material is discontinuous parallel the entirely straight current flow path in the channel material, the non-ferroelectric insulator material is continuous parallel the current flow path in the channel material.
8. A memory cell comprising:
a pair of source/drain regions having channel material extending there-between, the pair of source/drain regions and the channel material defining a current flow path that extends from one edge of one of the pair of source/drain regions through the channel material to one edge of the other of the pair of source/drain regions;
insulative charge-passage material;
programmable material;
a control gate;
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen; and
the ferroelectric insulator material is discontinuous parallel the current flow path in the channel material; and
the control gate has a pair of edges that are vertical in a vertical cross-section, the discontinuous ferroelectric insulator material having at least one outermost vertical edge in the vertical cross-section that is not coincident with either of the vertical edges of the control gate in the vertical cross-section.
9. The memory cell of claim 8 wherein the discontinuous ferroelectric insulator material has only one outermost vertical edge in the vertical cross-section that is not coincident with either of the vertical edges of the control gate in the vertical cross-section.
10. The memory cell of claim 8 wherein the non-ferroelectric insulator material is continuous parallel the current flow path in the channel material.
11. A memory cell comprising:
a pair of source/drain regions having channel material extending there-between, the pair of source/drain regions and the channel material defining a current flow path that extends from one edge of one of the pair of source/drain regions through the channel material to one edge of the other of the pair of source/drain regions, the current flow path being entirely straight between the one edges of the pair of source/drain regions;
insulative charge-passage material;
programmable material;
a control gate;
charge-blocking material between the programmable material and the control gate, the charge-blocking material comprising:
a non-ferroelectric insulator material;
a ferroelectric insulator material comprising hafnium, zirconium, and oxygen;
the ferroelectric insulator material is discontinuous parallel the entirely straight current flow path in the channel material; and
the control gate has a pair of edges that are vertical in a vertical cross-section, the discontinuous ferroelectric insulator material having at least one outermost vertical edge in the vertical cross-section that is not coincident with either of the vertical edges of the control gate in the vertical cross-section.
12. The memory cell of claim 11 wherein the discontinuous ferroelectric insulator material has only one outermost vertical edge in the vertical cross-section that is not coincident with either of the vertical edges of the control gate in the vertical cross-section.
13. The memory cell of claim 11 wherein the non-ferroelectric insulator material is continuous parallel the current flow path in the channel material.