Decoder for memory system and method thereof
Decoder is provided for memory systems. The decoder receives data from a memory device including a plurality of pages, each storing data, and decoding the data based on a type of a page in which the data is stored, among the plurality of pages and life cycle information indicating a current state of the memory device in its life cycle.
1. A system comprising:
a memory device including a plurality of pages, each storing data and being of a specific type; and
a controller storing a plurality of parameter groups, each group being associated with a specific type of page at a particular state of the memory device, the controller including a decoder suitable for receiving data from the memory device, wherein the controller selects a parameter group from the plurality of parameter groups based on the specific type of page in which the data is stored and a current state of the memory device and decodes the data using the selected parameter group, and wherein each of the plurality of parameter groups includes a number of iterations of decoding to be performed.
2. The system of claim 1 , wherein the decoder includes:
a selector suitable for selecting the parameter group associated with the page in which the data is stored; and
a decoding engine suitable for decoding the data using the selected parameter group to generate decoded data.
3. The system of claim 2 , further comprising:
a storage suitable for storing the plurality of parameter groups.
4. The system of claim 2 , wherein the decoding engine decodes the data based on a low density parity check (LDPC) scheme.
5. The system of claim 1 , wherein the specific types of pages include a most significant bit (MSB) page, a center significant bit (CSB) page and a least significant bit (LSB) page.
6. The system of claim 1 , wherein the current state of the memory device is determined based on time-based error information.
7. The system of claim 6 , wherein the time-based error information includes one of failed-bit distributions and raw bit error rates for the specific type of page.
8. The system of claim 6 , wherein the time-based error information is obtained from previous decoding results.
9. The system of claim 1 , wherein the current state of the memory device includes one of beginning of life, middle of life and end of life.
10. A method for operating a system including a memory device, which includes a plurality of pages, each storing data and being of a specific type, the method comprising:
receiving data from the memory device;
selecting a parameter group from among a plurality of parameter groups based on the specific type of page in which the data is stored and a current state of the memory device; and
decoding the data using the selected parameter group,
wherein each of the parameter groups is associated with a specific type of page at a particular state of the memory device, and
wherein each of the plurality of parameter groups includes a number of iterations of decoding to be performed.
11. The method of claim 10 , wherein the decoding of the data includes:
decoding the data using the selected parameter group to generate decoded data.
12. The method of claim 10 , wherein the decoding of the data includes decoding the data based on a low density parity check (LDPC) scheme.
13. The method of claim 10 , wherein the specific types of pages include a most significant bit (MSB) page, a center significant bit (CSB) page and a least significant bit (LSB) page.
14. The method of claim 10 , wherein the current state of the memory device is determined based on time-based error information.
15. The method of claim 14 , wherein the time-based error information includes one of failed-bit distributions and raw bit error rates for the specific type of page.
16. The method of claim 14 , wherein the time-based error information is obtained from previous decoding results.
17. The method of claim 10 , wherein the current state of the memory device includes one of beginning of life, middle of life and end of life.