IP Library Granted Patent US 11,152,454
Granted Patent B2
US 11,152,454 · App. 16/447,005 · Granted Oct 19, 2021

Method of forming a semiconductor device having a resistor and structure therefor

Inventors: Arash Elhami Khorasani (Phoenix, AZ); Mark Griswold (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L28/20H01L27/0629H01L27/0676
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,152,454
App. No.
16/447,005
Granted
Oct 19, 2021
Kind
B2
Abstract

In an embodiment, a semiconductor device includes a resistor that overlies a doped region of the semiconductor device. The resistor is formed into a pattern of a polygon spiral. An embodiment of the pattern of the resistor includes sides and corners. The material of the sides has a low resistivity and the material of the corners has a higher resistivity.

Claims (33)

1. A semiconductor device having a resistor element comprising:

a semiconductor substrate having a first conductivity type;

a first doped region of a second conductivity type on a first portion of the semiconductor substrate wherein the first doped region forms a drift region of a transistor;

a second doped region of the second conductivity type in the semiconductor substrate and spaced apart from the first doped region wherein the second doped region forms another region of the transistor;

an insulator overlying the first doped region; and

a resistor overlying the insulator, the resistor formed in a rectangular spiral shape having a plurality of revolutions, each revolution having sides and curved corners that connect the sides, the curved corners formed from a first semiconductor material having a first resistivity and the sides formed from a second semiconductor material having a second resistivity wherein the first resistivity is at least one hundred times greater than the second resistivity.

2. The semiconductor device of claim 1 wherein the second resistivity is between approximately two ohms per square and twenty ohms per square.

3. The semiconductor device of claim 1 wherein the first resistivity is between approximately three hundred ohms per square and five thousand ohms per square.

4. The semiconductor device of claim 1 wherein the first doped region includes either a drift region of a JFET transistor or a drift region of an MOS transistor or a doped region of a diode.

5. The semiconductor device of claim 1 wherein the curved corners are arcs of a circle.

6. The semiconductor device of claim 1 wherein the curved corners are arcs of a circle and a sum total of the arcs is approximately three-hundred sixty degrees.

7. A method of forming a semiconductor device comprising:

providing a semiconductor substrate having a first conductivity type;

forming a first doped region of a second conductivity type on a first portion of the semiconductor substrate;

forming an insulator overlying the first doped region; and

forming a resistor overlying the insulator and the first doped region including forming the resistor in a polygon spiral shape having a plurality of revolutions with each revolution having sides and corners, including forming the corners from a resistive material having a first resistivity and forming the sides from a first material having a second resistivity that is lower than the first resistivity.

8. The method of claim 7 including forming the polygon spiral shape as one of a rectangular spiral, a square spiral, or a hexagonal spiral.

9. The method of claim 7 including forming the sides of adjacent revolutions spaced a first distance from each other.

10. The method of claim 9 including forming the first distance to be substantially constant for each revolution.

11. The method of claim 7 including forming the sides from the first material that is substantially a conductor.

12. The method of claim 11 including forming the first resistivity to be at least approximately three hundred ohms per square.

13. The method of claim 7 including forming the second resistivity to be no greater than approximately twenty ohms per square.

14. The method of claim 13 including forming the first resistivity to be at least approximately three hundred ohms per square.

15. The method of claim 7 further including forming the resistive material from either polysilicon or doped polysilicon.

16. The method of claim 15 further including forming the first material from a conductor.

17. The method of claim 15 further including forming the first material from either a silicided polysilicon or a salacided polysilicon.

18. A method of forming a semiconductor device having a resistor comprising:

providing a semiconductor substrate having a first conductivity type;

forming a first doped region of a second conductivity type on a first portion of the semiconductor substrate;

forming an insulator overlying the first doped region; and

forming a material overlying the insulator and the first doped region including forming the material as an elongated element that is formed in a pattern of a spiral having a plurality of revolutions wherein each revolution has sides and a corner that interconnects two of the sides, including forming the corner from a first material having a first resistivity and forming the sides from a second material having a second resistivity that is lower than the first resistivity.

19. The method of claim 18 including forming the second material from polysilicon having a resistivity that is less than twenty ohms per square.

20. The method of claim 19 including forming the first material from polysilicon having a resistivity that is greater than one hundred ohms per square.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 050156, FRAME 0421 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0639 →
SECURITY INTEREST Recorded Aug 23, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 050156/0421 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2019
From: ELHAMI KHORASANI, ARASH; GRISWOLD, MARK
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 049538/0890 →