IP Library Patent Application 16451418
Patent Application
App. No. 16/451,418

METHOD OF MANUFACTURING CISCSP WITHOUT DAM

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Quick Facts
Patent No.
US None
App. No.
16/451,418
Abstract

Implementations of semiconductor packages may include: a die having a first side and a second side and at least two through silicon vias (TSVs) extending from a first side of the die to the second side of the die. Semiconductor packages may also include a glass lid coupled to a second side of the die through adhesive. The adhesive may be positioned over the at least two TSVs. Semiconductor packages may also include a molding compound around a perimeter of the die, extending from the first side of the die to at least the glass lid.

Claims (39)

1 . A semiconductor package comprising:

a die comprising a first side and a second side;

at least two through silicon vias (TSVs) extending from a first side of the die to the second side of the die, the at least two TSVs positioned on opposite sides of an active area of the die;

a glass lid coupled to a second side of the die through adhesive, the adhesive positioned over the at least two TSVs;

a molding compound comprised around a perimeter of the die, extending from the first side of the die to at least the glass lid.

2 . The semiconductor package of claim 1 , further comprising a redistribution layer (RDL) on a first side of the die.

3 . The semiconductor package of claim 1 , further comprising a ball grid array coupled to the RDL.

4 . The semiconductor package of claim 1 , further comprising a die pad between the adhesive and the TSV.

5 . The semiconductor package of claim 1 , wherein the glass lid comprises a cavity forming a gap between the active area of the die and the glass lid.

6 . A method for forming a semiconductor package, the method comprising:

providing a glass cover comprising a plurality of cavities formed therein on a first side of the glass cover;

applying adhesive to the glass cover on a first side and a second side of each of the plurality of cavities;

coupling a plurality of die to each of the plurality of cavities through the adhesive;

applying a molding compound over the plurality of die and to the first side of the glass cover;

after applying the molding compound, forming at least two through silicon vias (TSVs) through each of the plurality of die, the TSVs positioned around an active area of the die;

forming a redistribution layer (RDL) on the first side of each of the plurality of die, the RDL extending over the TSVs; and

singulating each of the plurality of die to form a plurality of semiconductor packages.

7 . The method of claim 6 , further comprising applying a ball grid array to the RDL over each of the plurality of die.

8 . The method of claim 6 , wherein forming at least two TSVs through each of the plurality of die and forming a redistribution layer on the first side of each of the plurality of die occurs before applying the molding compound.

9 . The method of claim 6 , wherein applying the adhesive further comprises applying over a die pad.

10 . The method of claim 9 , further comprising thinning the molding compound and a first side of each of the plurality of die.

11 . The method of claim 6 , wherein the each of the plurality of die is an image sensor.

12 . The method of claim 6 , further comprising filling at least a portion of the TSVs with the adhesive.

13 . A method for forming a semiconductor package, the method comprising:

providing a glass cover with a plurality of cavities on a first side of the glass cover;

applying adhesive to the glass cover between each of the plurality of cavities;

coupling a semiconductor wafer to the glass cover over the plurality of cavities, wherein each of a plurality of die correspond with each of the plurality of cavities;

thinning a first side of the semiconductor wafer;

forming at least two through silicon vias (TSVs) through each of the plurality of die, the TSVs positioned around an active area of the die;

forming a redistribution layer (RDL) on the first side of each of the plurality of die, the RDL extending over the TSVs;

performing a first cut between each of the plurality of die;

applying a molding compound over the plurality of die and extending to the first side of the glass cover; and

performing a second cut between each of the plurality of die.

14 . The method of claim 13 , wherein performing the first cut extends only through the semiconductor wafer.

15 . The method of claim 13 , wherein performing the first cut extends through the semiconductor wafer and the glass cover between the plurality of die and plurality of cavities, respectively.

16 . The method of claim 13 , wherein performing the second cut singulates each of the plurality of die to form a plurality of semiconductor packages.

17 . The method of claim 13 , further comprising applying a ball grid array to a first side of each of the plurality of die.

18 . The method of claim 13 , further comprising coupling a second side of the glass cover to a carrier wafer.

19 . The method of claim 15 , further comprising removing each of the plurality of semiconductor wafers from the carrier wafer after performing the second cut.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL 050156, FRAME 0421 Recorded Aug 16, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064615/0639 →
SECURITY INTEREST Recorded Aug 23, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 050156/0421 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2019
From: HSU, SHOU-CHIAN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 049578/0183 →