IP Library Granted Patent US 10,700,610
Granted Patent B1
US 10,700,610 · App. 16/455,503 · Granted Jun 30, 2020

Primary controller calibration and trimming using secondary controller in secondary-controlled flyback converters

Inventor: Hariom Rai (Bangalore, IN)
Assignee: Cypress Semiconductor Corporation
H02M3/33523H02M3/33507H02M3/33515H02M3/33538
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Quick Facts
Patent No.
US 10,700,610
App. No.
16/455,503
Granted
Jun 30, 2020
Kind
B1
Abstract

Communicating information stored at a secondary controller to a primary controller in a secondary-controlled flyback converter is described. In one embodiment, a method includes storing, by a secondary-side controller of a power converter, calibration information associated with a primary-side controller of the power converter. The power converter is a secondary-controlled alternating current to direct current (AC-DC) flyback converter comprising a galvanic isolation barrier. The method further includes sending, by the secondary-side controller, the calibration information to the primary-side controller across the galvanic isolation barrier in response to power-up of the power converter.

Claims (63)

1. A method comprising:

storing, by a secondary-side controller of a power converter, calibration information associated with a primary-side controller of the power converter, wherein the power converter is a secondary-controlled alternating current to direct current (AC-DC) flyback converter comprising a galvanic isolation barrier;

sending, by the secondary-side controller a signal with a specific pattern without clock synchronization of the primary-side controller and the secondary-side controller to notify the primary-side controller that the secondary-side controller is to send the calibration information in a pre-defined sequence; and

sending, by the secondary-side controller, the calibration information to the primary-side controller across the galvanic isolation barrier in response to power-up of the power converter.

2. The method of claim 1 , wherein sending the calibration information comprises sending, by a pulse transformer of the secondary-side controller to the primary-side controller across the galvanic isolation barrier, the calibration information as pulse information.

3. The method of claim 1 , wherein sending the calibration information comprises:

generating, by a pulse width modulation (PWM) controller of the secondary-side controller, a PWM pulse signal; and

applying the PWM pulse signal to a secondary side of a pulse transformer, wherein applying the PWM pulse signal to the secondary side of the pulse transformer induces a signal on a primary side of the pulse transformer to send the calibration information to the primary-side controller across the galvanic isolation barrier.

4. The method of claim 3 , further comprising:

receiving, by a pulse receiver of the primary-side controller, the signal on the primary side of the pulse transformer; and

outputting, by the pulse receiver, a control signal to a gate of a primary switching field effect transistor (FET) via a gate driver of the primary-side controller, wherein the control signal turns the primary switching FET on and off to control a flyback transformer of the power converter.

5. The method of claim 1 , wherein sending the calibration information comprises sending the calibration information in the pre-defined sequence across the galvanic isolation barrier after sending the signal with the specific pattern.

6. The method of claim 1 , wherein storing the calibration information comprises storing the calibration information in non-volatile memory (NVM) of the secondary-side controller.

7. The method of claim 1 , wherein the calibration information comprises trimming data for the primary-side controller, and wherein storing the calibration information comprises storing the trimming data in non-volatile memory (NVM) of the secondary-side controller.

8. The method of claim 1 , wherein the calibration information comprises firmware-based modifications to firmware of the primary-side controller, wherein the firmware-based modifications relate to the at least one of a primary side of the power converter or a specific circuit board in which the power converter is disposed, and wherein storing the calibration information comprises storing the firmware-based modifications in nonvolatile memory (NVM) of the secondary-side controller.

9. The method of claim 1 , wherein the calibration information comprises user-defined settings pertaining to the primary-side controller, and wherein storing the calibration information comprises storing the user-defined settings in non-volatile memory (NVM) of the secondary-side controller.

10. The AC-DC flyback converter of claim 9 , wherein the secondary-side controller comprises:

a pull-up transistor;

a pull-down transistor; and

a resistive element that is selectively coupled between at least one of the pull-up transistor or the pull-down transistor.

11. An alternative current to direct current (AC-DC) flyback converter comprising:

a flyback transformer;

a primary-side controller coupled to the flyback transformer; and

a secondary-side controller coupled to the flyback transformer, wherein the flyback transformer comprises non-volatile memory to store calibration information associated with the primary-side controller, wherein the secondary-side controller is configured to send a signal with a specific pattern without clock synchronization of the primary-side controller and the secondary-side controller to notify the primary-side controller that the secondary-side controller is to send the calibration information in a pre-defined sequence and the calibration information to the primary-side controller across a galvanic isolation barrier of the AC-DC flyback converter in response to power-up of the AC-DC flyback converter.

12. The AC-DC flyback converter of claim 11 , further comprising a pulse transformer coupled to the primary-side controller and the secondary-side controller.

13. The AC-DC flyback converter of claim 11 , wherein the secondary-side controller comprises non-volatile memory to store the calibration information.

14. The AC-DC flyback converter of claim 11 , wherein the secondary-side controller comprises a programmable driver with pull-up and pull-down to send the signal with the specific pattern to notify the primary-side controller that the secondary-side controller is to send the calibration information in the pre-defined sequence.

15. The AC-DC flyback converter of claim 11 , wherein the secondary-side controller comprises:

a pulse transformer;

a capacitor coupled to the pulse transformer;

a pull-up transistor coupled to the capacitor;

a pull-down transistor coupled to the capacitor; and

a resistive element that is selectively coupled between at least one of the pull-up transistor and the capacitor or the pull-down transistor and the capacitor.

16. An alternative current to direct current (AC-DC) power adapter device comprising:

a flyback transformer coupled between AC terminals and DC terminals, the flyback transformer to convert AC power on the AC terminals to DC power on the DC terminals with galvanic isolation between the AC terminals and the DC terminals;

a primary-side controller coupled to the flyback transformer;

a secondary-side controller coupled to the flyback transformer;

a primary-side power switch;

a secondary-side power switch; and

a pulse transformer with a galvanic isolation barrier between the primary-side controller and the secondary-side controller, wherein the secondary-side controller comprises non-volatile memory and is configured to:

store information associated with the primary-side controller;

send a signal with a specific pattern without clock synchronization of the primary-side controller and the secondary-side controller to notify the primary-side controller that the secondary-side controller is to send the information in a pre-defined sequence; and

send the information to the primary-side controller across the galvanic isolation barrier via the pulse transformer.

17. The AC-DC power adapter device of claim 16 , wherein the primary-side controller comprises:

a pulse receiver to receive a signal from the secondary-side controller across the galvanic isolation barrier; and

a gate driver coupled to the pulse receiver and a gate of the primary-side power switch.

18. The AC-DC power adapter device of claim 16 , wherein the primary-side controller comprises logic circuitry to detect a specific pattern in a signal from the pulse transformer.

19. The AC-DC power adapter device of claim 16 , wherein the primary-side controller comprises logic circuitry to detect at least two consecutive zeros or two consecutive ones in a signal from the pulse transformer.

20. An alternative current to direct current (AC-DC) power adapter device, comprising:

a flyback transformer coupled between AC terminals and DC terminals, the flyback transformer to convert AC power on the AC terminals to DC power on the DC terminals with galvanic isolation between the AC terminals and the DC terminals;

a primary-side controller coupled to the flyback transformer;

a secondary-side controller coupled to the flyback transformer;

a primary-side power switch;

a secondary-side power switch; and

a pulse transformer with a galvanic isolation barrier between the primary-side controller and the secondary-side controller, wherein the secondary-side controller comprises non-volatile memory and is configured to:

store information associated with the primary-side controller; and

send the information to the primary-side controller across the galvanic isolation barrier via the pulse transformer;

a rectifier coupled between the AC and a AC line (Vin), wherein the AC line is coupled to a first end of a primary winding of the flyback transformer, wherein a second end of the primary winding is coupled to a primary drain of the primary-side power switch, wherein a first end of a secondary winding of the flyback transformer is coupled to a direct current (DC) output line (VBUS) and a second end of the secondary winding is coupled to a secondary drain of a secondary-side power switch; and

a bulk capacitor coupled between the AC line and a ground node, wherein the primary-side controller, to apply the pulse signal to the primary-side power switch, is configured to:

receive a turn-on pulse from the secondary-side controller;

apply the turn-on pulse to a gate of the primary-side power switch, the turn-on pulse causing a primary drain of the primary-side power switch to go from a lower state to a higher state and the secondary drain of the secondary-side power switch to go from a lower state to a higher state;

receive a turn-off pulse from the secondary-side controller; and

apply the turn-off pulse to the gate of the primary-side power switch, the turn-off pulse causing the primary-side power switch to go low and the secondary drain to go low.

Assignments (4)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
SECURITY INTEREST Recorded Jul 31, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MUFG UNION BANK, N.A.
Reel/Frame 049917/0093 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2019
From: RAI, HARIOM
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 049833/0417 →