Anti-flare semiconductor packages and related methods
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.
1. A semiconductor package comprising:
a semiconductor die comprising a first side and a second side;
a first side of an optically transmissive lid coupled to the second side of the semiconductor die through one or more dams;
a light block material comprised around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid; and
an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die;
wherein the second side of the optically transmissive lid comprises an indentation on each of a first edge and a second edge of the optically transmissive lid.
2. The semiconductor package of claim 1 , wherein the light block material is a molding compound.
3. The semiconductor package of claim 1 , further comprising a redistribution layer coupled to the first side of the semiconductor die.
4. The semiconductor package of claim 1 , wherein the opening corresponds with a pixel array in the semiconductor die.
5. The semiconductor package of claim 1 , further comprising one or more die pads coupled to each of the one or more dams.
6. The semiconductor package of claim 1 , further comprising a plurality of through silicon vias (TSVs), a passivation layer, a solder mask, and two or more bumps.
7. A semiconductor package comprising:
a semiconductor die comprising a first side and a second side;
a first side of an optically transmissive lid coupled to the second side of the semiconductor die through one or more dams, a second side of the optically transmissive lid comprising a first recess and a second recess on a first edge and a second edge of the optically transmissive lid, respectively; and
a light blocking material encapsulating the semiconductor package from a first side of the semiconductor die into the first recess and into the second recess on the second side of the lid.
8. The semiconductor package of claim 7 , further comprising an opening in the light blocking material, the opening comprised between the first recess and the second recess on the second side of the optically transmissive lid.
9. The semiconductor package of claim 7 , wherein the light blocking material is a molding compound.
10. The semiconductor package of claim 7 , further comprising a redistribution layer (RDL) coupled to the first side of the semiconductor die.
11. The semiconductor package of claim 7 , wherein an active area of the semiconductor die corresponds with the first recess and the second recess in the optically transmissive glass lid.
12. The semiconductor package of claim 7 , further comprising one or more die pads coupled to each of the one or more dams.
13. The semiconductor package of claim 7 , further comprising a plurality of through silicon vias (TSVs), a passivation layer, a solder mask, and two or more bumps.