IP Library Granted Patent US 11,012,186
Granted Patent B2
US 11,012,186 · App. 16/473,013 · Granted May 18, 2021

Error check-based synchronization and broadcast channel

Inventors: Kyle Jung-Lin Pan (Saint James, NY); Fengjun Xi (San Diego, CA)
Assignee: IDAC Holdings, Inc.
H04L1/0061H04J11/0073H04J11/0076H04L1/0072H04L5/0053H04L69/324
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Quick Facts
Patent No.
US 11,012,186
App. No.
16/473,013
Granted
May 18, 2021
Kind
B2
Abstract

Systems, methods, and instrumentalities are disclosed for error check-based synchronization. Physical Broadcast Channel (PBCH) data may be determined. A scrambling (e.g., a first scrambling) of the PBCH data may be scrambled via a sequence (e.g., a first sequence). The first sequence may be based on a cell ID and/or timing information. Error check bits may be attached to the scrambled PBCH data and to the timing information. The error check bits may include one or more cyclic redundancy check (CRC) bits. The scrambled PBCH data, the timing information (e.g., the unscrambled timing information), and/or the attached error check bits may be polar encoded. The polar encoding may result in polar encoded bits. A scrambling (e.g., a second scrambling) of the polar encoded bits may be scrambled via a sequence (e.g., a second sequence). The first sequence and the second sequence may be different. The polar encoded bits may be transmitted.

Claims (23)

1. A network device, comprising:

a processor configured to:

determine Physical Broadcast Channel (PBCH) data;

perform a first scrambling of the PBCH data via a first sequence, wherein the first sequence is a function of a cell ID and timing information;

attach error check bits to the scrambled PBCH data and to the timing information, wherein the error check bits comprise one or more cyclic redundancy check (CRC) bits and the timing information is unscrambled;

polar encode the scrambled PBCH data, the unscrambled timing information, and the attached error check bits, wherein the polar encoding results in polar encoded bits; and

perform a second scrambling of the polar encoded bits via a second sequence.

2. The network device of claim 1 , wherein the timing information comprises at least one of a system frame number, a subset of a system frame number, a half radio frame number, or a synchronization signal (SS) block index.

3. The network device of claim 1 , wherein the first sequence and the second sequence are different.

4. The network device of claim 1 , wherein the processor is further configured to transmit the scrambled polar encoded bits.

5. The network device of claim 4 , wherein the processor is further configured to transmit the scrambled polar encoded bits via a waveform.

6. The network device of claim 4 , wherein the PBCH data is new radio (NR)-PBCH data.

7. A method, comprising:

determining Physical Broadcast Channel (PBCH) data;

performing a first scrambling of the PBCH data via a first sequence, wherein the first sequence is a function of a cell ID and timing information;

attaching error check bits to the scrambled PBCH data and to the timing information, wherein the error check bits comprise one or more cyclic redundancy check (CRC) bits and the timing information is unscrambled;

polar encoding the scrambled PBCH data, the unscrambled timing information, and the attached error check bits, wherein the polar encoding results in polar encoded bits; and

performing a second scrambling of the polar encoded bits via a second sequence.

8. The method of claim 7 , wherein the timing information comprises at least one of a system frame number, a subset of a system frame number, a half radio frame number, or a synchronization signal (SS) block index.

9. The method of claim 7 , wherein the first sequence and the second sequence are different.

10. The method of claim 7 , further comprising transmitting the scrambled polar encoded bits.

11. The method of claim 10 , further comprising transmitting the scrambled polar encoded bits via a waveform.

12. The method of claim 10 , wherein the PBCH data is new radio (NR)-PBCH data.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2023
From: PAN, KYLE JUNG-LIN; XI, FENGJUN
To: IDAC HOLDINGS, INC.
Reel/Frame 064655/0243 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2023
From: IDAC HOLDINGS, INC.
To: INTERDIGITAL PATENT HOLDINGS, INC.
Reel/Frame 063089/0085 →
Continuity (4)
Provisional Application 62555908 · Sep 8, 2017
Provisional Application 62500769 · May 3, 2017
Provisional Application 62443038 · Jan 6, 2017
Related Publication 20190319745A1 · Oct 17, 2019