IP Library Granted Patent US 11,016,928
Granted Patent B2
US 11,016,928 · App. 16/473,473 · Granted May 25, 2021

Microcomputer and logic circuit

Inventors: Satoshi Tsutsumi (Tokyo, JP); Taisuke Ueta (Tokyo, JP); Shuhei Kaneko (Hitachinaka, JP); Kenichi Osada (Hitachinaka, JP)
Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
G06F15/78G06F1/24G06F9/32G06F12/126H04L12/40H04L2012/40215
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Quick Facts
Patent No.
US 11,016,928
App. No.
16/473,473
Granted
May 25, 2021
Kind
B2
Abstract

A microcomputer is connected to a logic circuit. The microcomputer includes a monitoring unit monitoring the state of the logic circuit, a storage unit storing a plurality of information processing items executed by the microcomputer, and a processing unit executing a process on the basis of the state of the logic circuit and at least one information processing item selected from the plurality of information processing items on the basis of a communication frame inputted to the microcomputer.

Claims (26)

1. A microcomputer that is connected to a logic circuit comprising:

a monitoring unit monitoring a state of the logic circuit;

a storage unit storing a plurality of information processing items executed by the microcomputer; and

a processing unit executing a process on the basis of the state of the logic circuit and at least one information processing item selected from the plurality of information processing items on the basis of a communication frame inputted to the microcomputer,

wherein the logic circuit is subject to configure to be capable of constituting a circuit constitution,

wherein the monitoring unit monitors whether or not the logic circuit is in configure state,

wherein when the logic circuit is not in the configure state, the processing unit executes a first process including the selected information processing item,

wherein when the logic circuit is in the configure state, the processing unit executes a second process that is different from the selected information processing item,

wherein the microcomputer and the logic circuit are included in one gateway device that connects a controller area network (CAN) with an Ethernet, and

wherein the microcomputer is connected to the CAN, and the logic circuit is connected to the Ethernet.

2. The microcomputer according to claim 1 ,

wherein the monitoring unit monitors whether or not the logic circuit is in configure completion state, and

wherein when the logic circuit is in the configure completion state, the processing unit allows the logic circuit to process at least part of the selected information processing item.

3. The microcomputer according to claim 1 ,

wherein the monitoring unit monitors whether or not the logic circuit is in the configure completion state, and

wherein when the logic circuit is in the configure state, the processing unit stores at least part of the communication frame, and when the logic circuit is changed from the configure state to the configure completion state, at least the stored part of the communication frame is transmitted to the logic circuit.

4. The microcomputer according to claim 1 ,

wherein the monitoring unit monitors whether or not the logic circuit is failed,

wherein when the logic circuit is not failed, the processing unit executes the first process including the selected information processing item, and

wherein when the logic circuit is failed, the processing unit executes the second process different from the selected information processing item.

5. The microcomputer according to claim 4 ,

wherein the monitoring unit monitors a degree of the failure of the logic circuit, and

wherein when the logic circuit is failed, the processing unit changes a process executed according to the degree of the failure.

6. The microcomputer according to claim 5 ,

wherein the storage unit further stores a priority table that represents a threshold value that is a processing condition with respect to each of the plurality of information processing items, and

wherein when the logic circuit is partially failed, the processing unit obtains the threshold value with respect to the selected information processing item on the basis of the priority table, and decides, on the basis of the obtained threshold value and the load acceptance capacity of the logic circuit, whether or not the selected information processing item is executed.

Assignments (2)
CHANGE OF NAME Recorded Nov 22, 2021
From: HITACHI AUTOMOTIVE SYSTEMS, LTD.
To: HITACHI ASTEMO, LTD.
Reel/Frame 058598/0321 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2019
From: TSUTSUMI, SATOSHI; UETA, TAISUKE; KANEKO, SHUHEI; OSADA, KENICHI
To: HITACHI AUTOMOTIVE SYSTEMS, LTD.
Reel/Frame 049664/0524 →
Priority Claims (1)
JP JP2016-252782 · Dec 27, 2016 · national
Continuity (1)
Related Publication 20190370220A1 · Dec 5, 2019