IP Library Granted Patent US 11,456,116
Granted Patent B2
US 11,456,116 · App. 16/474,015 · Granted Sep 27, 2022

Magnetic coils in locally thinned silicon bridges and methods of assembling same

Inventors: Andreas Augustin (Munich, DE); Bernd Waidhas (Pettendorf, DE); Sonja Koller (Regensburg, DE); Reinhard Mahnkopf (Oberhaching, DE); Georg Seidemann (Landshut, DE)
Assignee: Intel Corporation
H01F41/046H01F17/0006H01F27/24H01L23/645H01L27/016H01L28/10H01F2017/0066Y10T428/32
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Quick Facts
Patent No.
US 11,456,116
App. No.
16/474,015
Granted
Sep 27, 2022
Kind
B2
Abstract

A recess in a die backside surface occupies a footprint that accommodates an inductor coil that is formed in metallization above an active surface of the die. Less semiconductive material is therefore close to the inductor coil. A ferromagnetic material is formed in the recess, or a ferromagnetic material is formed on a dielectric layer above the inductor coil. The recess may extend across a die that allows the die to be deflected at the recess.

Claims (39)

1. A semiconductive apparatus, comprising:

a semiconductive die including an active surface, a backside surface and a recess in the backside surface;

a metallization layer on the active surface, wherein the metallization includes an inductor coil positioned above the recess; and

an active surface ferromagnetic layer disposed above the inductor coil.

2. The semiconductive apparatus of claim 1 , further including a backside ferromagnetic layer disposed in the recess.

3. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess.

4. The semiconductive apparatus of claim 1 , wherein the thinned bridge is deflected out of planarity to a degree between 1° and about 180°.

5. The semiconductive apparatus of claim 1 , wherein the die is locally thinned at an edge of the die.

6. The semiconductive apparatus of claim 1 , wherein the die is locally thinned as an exclave of the die at an edge of the die.

7. The semiconductive apparatus of claim 1 , wherein the die is locally thinned as an entire edge of the die.

8. The semiconductive apparatus of claim 1 , wherein the die is locally thinned as an enclave of the die.

9. The semiconductive apparatus of claim 1 , wherein the recess reaches bottom at a depth, wherein the semiconductive die has an overall height that is about four times taller than the recess bottom depth.

10. The semiconductive apparatus of claim 1 , wherein the recess reaches bottom at a depth, wherein the recess bottom depth is about half the semiconductive die overall height.

11. The semiconductive apparatus of claim 1 , wherein the recess reaches bottom at a depth, wherein the semiconductive die has an overall height that is more than double the recess bottom depth.

12. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess, wherein the active surface ferromagnetic layer has a first ferromagnetivity and the backside ferromagnetic layer has a different ferromagnetivity.

13. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess, wherein the ferromagnetivity of the backside ferromagnetic layer is the same as the ferromagnetivity of the active surface ferromagnetic layer.

14. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess, wherein the ferromagnetivity of the backside ferromagnetic layer is quantitively different than the ferromagnetivity of the active surface ferromagnetic layer.

15. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess, wherein the ferromagnetivity of the backside ferromagnetic layer is greater than the ferromagnetivity of the active surface ferromagnetic layer.

16. The semiconductive apparatus of claim 1 , further including:

an active surface ferromagnetic layer disposed above the inductor coil; and

a backside ferromagnetic layer disposed in the recess, wherein the ferromagnetivity of the backside ferromagnetic layer is less than the ferromagnetivity of the active surface ferromagnetic layer.

17. A computing system, comprising:

a semiconductive die that includes:

a locally thinned region, wherein the locally thinned region is formed in a recess at a backside surface of the die;

and active area of the die disposed opposite the backside surface;

a metallization covering the active area including an inductor coil disposed vertical to the recess;

an active surface ferromagnetic layer disposed above the inductor coil; and

a mounting substrate onto which the die is disposed.

18. The computing system of claim 17 , wherein the mounting substrate includes an insulated outer shell.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056337/0609 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2019
From: AUGUSTIN, ANDREAS; WAIDHAS, BERND; KOLLER, SONJA; MAHNKOPF, REINHARD; SEIDEMANN, GEORG
To: INTEL IP CORPORATION
Reel/Frame 049684/0057 →