Area efficient single-ended analog-to-digital converter
A single ended n-bit hybrid digital-to-analog converter is configured to receive as an input an analog signal and produce an n-bit digital output. The converter includes a split main sub-digital-to-analog converter capacitor array, a most significant bit capacitor array, and a main capacitor array. A coupling capacitor couples the main array to the split main sub-digital-to-analog convert.
1. An analog to digital converter (ADC) 2600 comprising:
a first single ended n-bit hybrid digital-to-analog converter (DAC) ( 2610 ) switchably referenced to an input voltage (V IN ) and a supply voltage (V DD );
a second single ended n-bit hybrid digital-to-analog converter (DAC) ( 2620 ) switchably referenced to the input voltage and connected in series to the first DAC via a switch (SW series );
a comparator configured to receive a first output from the first DAC and a second output from the second DAC; and
a successive approximation register (SAR) ( 2650 ) configured to provide an n-bit output to the second DAC and a complement of the n-bit output to the first DAC, wherein n is a positive integer and the first DAC and the second DAC are combined in a pseudo-differential bipolar manner.
2. The ADC of claim 1 , wherein n is in the range of 4 to 16.