IP Library Granted Patent US 11,262,396
Granted Patent B2
US 11,262,396 · App. 16/485,149 · Granted Mar 1, 2022

Functional tester for printed circuit boards, and associated systems and methods

Inventors: Jonathan Allen Feucht (Arlington, WA); Peter Andrew Pias (Marysville, WA); Daniel Benjamin Carson (Arlington, WA)
Assignee: CHECKSUM, LLC
G01R31/2806G01R31/31701G01R31/31907
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Quick Facts
Patent No.
US 11,262,396
App. No.
16/485,149
Granted
Mar 1, 2022
Kind
B2
Abstract

Systems and methods for testing printed circuit boards (PCBs) are disclosed herein. In one embodiment, a tester for printed circuit boards (PCBs) includes a test fixture having a plurality of electrical contacts for contacting the PCBs that are units under test (UUTs). The test fixture carries a remote test peripheral master (RTPM) module, and a remote test peripheral slave (RTPS) module. The RTPM module and the RTPS module are connected through a remote test peripheral (RTP) bus.

Claims (45)

1. A tester for printed circuit boards (PCBs), comprising:

a test fixture having a plurality of electrical contacts for contacting the PCBs that are units under test (UUTs), wherein the test fixture carries:

a remote test peripheral master (RTPM) module, and

a remote test peripheral slave (RTPS) module, wherein the RTPM module and the RTPS module are connected through a remote test peripheral (RTP) serial bus, and wherein the RTPM module is configured for communicating with the UUTs exclusively through the RTPS module,

a control system that is separate from the test fixture, wherein the test fixture is connected with the control system through a high speed serial bus that is separate from the RTP serial bus.

2. The tester of claim 1 , wherein the RTPS module is a first RTPS module, the tester further comprising a second RTPS module in communication with the first RTPS module.

3. The tester of claim 2 , wherein the RTPM module is a first master module, the first RTPS module belongs to a first plurality of RTPS modules, and the RTP serial bus is a first RTP serial bus, the tester further comprising:

a second RTPM module, and

a second plurality of RTPS modules, wherein the second RTPM module and the second plurality of RTPS modules are connected through a second RTP serial bus.

4. The tester of claim 3 , wherein the first RTPM module and the first plurality of the RTPS modules are vertically stacked in a first stack, and wherein the second RTPM module and the second plurality of the RTPS modules are vertically stacked in a second stack.

5. The tester of claim 1 , further comprising a control system that includes:

an in-circuit tester and manufacturing defects analyzer (ICT/MDA), and

a host controller.

6. The tester of claim 5 , further comprising a plurality of relays connecting the ICT/MDA with the RTPS module.

7. The tester of claim 5 , further comprising a high speed serial hub configured to route data between the RTPM module and the host controller.

8. The tester of claim 1 , wherein the RTP bus is an 8-bit asynchronous serial bus.

9. The tester of claim 1 , further comprising at least one UUT electrically connected to the test fixture through a plurality of contact pins.

10. The tester of claim 1 , further comprising at least one UUT optically or wirelessly connected to the test fixture.

11. The tester of claim 1 , further comprising a memory device configured to store test point information and test programs.

12. A method for testing printed circuit boards (PCBs) that are units under test (UUTs), the method comprising:

establishing a data channel between a remote test peripheral slave (RTPS) module and at least one UUT;

establishing a control channel between a remote test peripheral master (RTPM) module and the RTPS module through a remote test peripheral (RTP) serial bus, wherein the RTPM module and the RTPS module are carried by a test fixture, and wherein the RTPM module is configured for communicating with the UUTs exclusively through the RTPS module;

applying test program to the at least one UUT;

collecting test data by the RTPS module, wherein the test data are generated in response to applying the test program to the UUT; and

sending test data to a host controller of a control system through a high speed serial bus that is separate from the RTP serial bus, wherein the control system is separate from the test fixture.

13. The method of claim 12 , wherein the RTPS module is a first RTPS module in a master/slave chain, and wherein the master/slave chain includes a plurality of RTPS modules, the method further comprising:

controlling the plurality of RTPS modules by the RTPM module through the control channel.

14. The method of claim 13 , further comprising:

comparing, by at least one RTPS module, returned test data with expected return values, and

based on comparing, determining a pass/fail condition of the UUTs.

15. The method of claim 12 , wherein the test program executes a functional test (FT), and wherein the data channel is a first data channel, the method further comprising:

establishing a second data channel between an in-circuit tester and manufacturing defects analyzer (ICT/MDA) and the UUT; and

running in-circuit test on the UUT.

16. The method of claim 15 , further comprising:

connecting the UUT with the ICT/MDA through a plurality of relays when the plurality of relays are in a first position, and connecting the UUT with the RTPS module when the plurality of relays are in a second position.

17. The method of claim 12 , further comprising:

in response to a query from the RTPM module, reporting a configuration of the RTPS module to the RTPM module.

18. The method of claim 12 , further comprising:

running a self-diagnostics by the RTPS module; and

reporting the results of the self-diagnostics to the RTPM module.

19. The method of claim 18 , wherein the results of the self-diagnostics of the test module include at least one of an erroneous wiring, a hardware failure, or a power issue.

20. The method of claim 12 , wherein the test program is stored on a memory storage device carried by the test fixture.

21. The method of claim 20 , further comprising initiating an execution of the test program by the RTPM module.

22. The method of claim 12 , wherein multiple UUTs are tested in parallel.

23. The method of claim 22 , wherein the UUTs have different designs.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2019
From: FEUCHT, JONATHAN ALLEN; PIAS, PETER ANDREW; CARSON, DANIEL BENJAMIN
To: CHECKSUM, LLC
Reel/Frame 050974/0703 →
Continuity (2)
Provisional Application 62457593 · Feb 10, 2017
Related Publication 20200033396A1 · Jan 30, 2020