Semiconductor device
View Patent ↗Provided is a semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device and includes: a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode; a plurality of first resistor elements each including a first electrode and a second electrode, the first electrodes of the first resistor elements being electrically connected to the second electrode of the transistor element; one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected; a first external terminal electrically connected to the first electrode of the transistor element; and an external control terminal electrically connected to the control electrode. The one or more external resistance terminals, the first external terminal, and the external control terminal are external connection terminals provided on a surface of the semiconductor device.
1. A semiconductor device which is a facedown mounting, chip-size-package-type semiconductor device, the semiconductor device comprising:
a transistor element including a first electrode, a second electrode, and a control electrode which controls a conduction state between the first electrode and the second electrode;
a plurality of first resistor elements each of which includes a first electrode and a second electrode, the first electrodes of the plurality of first resistor elements being electrically connected to the second electrode of the transistor element;
one or more external resistance terminals to which the second electrodes of the plurality of first resistor elements are physically connected;
a first external terminal electrically connected to the first electrode of the transistor element; and
an external control terminal electrically connected to the control electrode, wherein:
the one or more external resistance terminals, the first external terminal, and the external control terminal are external connection terminals provided on a surface of the semiconductor device, and
the first electrodes of the plurality of first resistor elements are not electrically connected to the control electrode.
2. The semiconductor device according to claim 1 , wherein
the one or more external resistance terminals are two or more external resistance terminals which are disposed in a region occupying at least a half of a plan-view surface area of the semiconductor device.
3. The semiconductor device according to claim 1 , wherein
the second electrodes of the plurality of first resistor elements are electrically short- circuited to each other in the semiconductor device.
4. The semiconductor device according to claim 1 , wherein
resistance values of the plurality of first resistor elements are identical.
5. The semiconductor device according to claim 1 , further comprising:
a second external terminal on the surface of the semiconductor device, the second external terminal being electrically connected to the second electrode of the transistor element, wherein
the one or more external resistance terminals are two or more external resistance terminals which are radially disposed around the second external terminal in a plan view of the semiconductor device.
6. The semiconductor device according to claim 1 , further comprising:
a second external terminal on the surface of the semiconductor device, the second external terminal being electrically connected to the second electrode of the transistor element, wherein
the plurality of first resistor elements are radially disposed around the second external terminal in a plan view of the semiconductor device.
7. The semiconductor device according to claim 1 , further comprising:
a second external terminal on the surface of the semiconductor device, the second external terminal being electrically connected to the second electrode of the transistor element; and
a second resistor element in a current path between the second external terminal and the first electrode of the transistor element.
8. The semiconductor device according to claim 7 , wherein
the transistor element is a vertical transistor including:
a semiconductor substrate which comprises silicon containing an impurity of a first conductivity type; and
a first low-concentration impurity layer which is in contact with a top surface of the semiconductor substrate, and contains an impurity of the first conductivity type in a lower concentration than a concentration of the impurity of the first conductivity type in the semiconductor substrate,
the semiconductor substrate serves as the second electrode of the transistor element, and
the second resistor element:
is embedded below a top surface of the first low-concentration impurity layer;
includes a first electrode electrically connected to the second electrode of the transistor element; and
includes a second electrode electrically connected to the second external terminal.
9. The semiconductor device according to claim 1 , wherein
the transistor element is a vertical transistor including:
a semiconductor substrate which comprises silicon containing an impurity of a first conductivity type; and
a first low-concentration impurity layer which is in contact with a top surface of the semiconductor substrate, and contains an impurity of the first conductivity type in a lower concentration than a concentration of the impurity of the first conductivity type in the semiconductor substrate, and
the semiconductor substrate serves as the second electrode of the transistor element,
the semiconductor device further comprising:
one or more second resistor elements each of which is embedded below a top surface of the first low-concentration impurity layer, includes a first electrode which is electrically connected to the second electrode of the transistor element, and includes a second electrode which is electrically connected to the first electrode of at least one first resistor element included in the plurality of first resistor elements.
10. The semiconductor device according to claim 9 , wherein
the one or more second resistor elements are two or more second resistor elements a total number of which is identical to a total number of the plurality of first resistor elements,
the two or more second resistor elements correspond one-to-one with the plurality of first resistor elements, and
the second electrode of each of the two or more second resistor elements is electrically connected to the first electrode of a corresponding one of the plurality of first resistor elements which correspond to the two or more second resistor.
11. The semiconductor device according to claim 7 , wherein
the second resistor element is a semiconductor layer containing an impurity.
12. The semiconductor device according to claim 7 , wherein
the second resistor element is a polysilicon layer.
13. The semiconductor device according to claim 1 , wherein
in an arrangement of the external connection terminals in a plan view of the semiconductor device:
the one or more external resistance terminals are not included in a terminal line which includes the first external terminal and the external control terminal; and
the first external terminal and the external control terminal are not included in a terminal line which includes the one or more external resistance terminals.
14. The semiconductor device according to claim 1 , further comprising:
a second external terminal on the surface of the semiconductor device, the second external terminal being electrically connected to the second electrode of the transistor element, wherein
the second external terminal is disposed closer to a central portion of the semiconductor device than the external connection terminals are in a plan view of the semiconductor device, the external connection terminals excluding the second external terminal.
15. The semiconductor device according to claim 1 , wherein
in a plan view of the semiconductor device,
a shortest distance between at least one external resistance terminal included in the one or more external resistance terminals and an outer periphery of the semiconductor device is less than or equal to a shortest distance between at least one first resistor element included in the plurality of first resistor elements and the outer periphery of the semiconductor device the at least one first resistor element being electrically connected to the at least one external resistance terminal.
16. The semiconductor device according to claim 1 , wherein
in a plan view of the semiconductor device,
a shortest distance between a central point of at least one external resistance terminal included in the one or more external resistance terminals and an outer periphery of the semiconductor device is less than or equal to a shortest distance between a central point of at least one first resistor element included in the plurality of first resistor elements and the outer periphery of the semiconductor device, the at least one first resistor element being electrically connected to the at least one external resistance terminal.
17. The semiconductor device according to claim 1 , wherein
a primary material of the semiconductor device is silicon, and
a thickness of the semiconductor device is at least 250 μm.
18. The semiconductor device according to claim 17 , wherein the thickness of the semiconductor device is at least 350 μm.
19. The semiconductor device according to claim 1 , wherein a primary material of the semiconductor device is silicon, and a volume of the semiconductor device is at least 1.94 mm 3 .
20. The semiconductor device according to claim 19 , wherein the volume of the semiconductor device is at least 2.20 mm 3 .
21. The semiconductor device according to claim 20 , wherein the volume of the semiconductor device is at least 3.05 mm 3 .
22. The semiconductor device according to claim 1 , wherein
no external terminal having a potential identical to a potential of the second electrode of the transistor element is provided on the surface of the semiconductor device.