IP Library Granted Patent US 11,088,797
Granted Patent B2
US 11,088,797 · App. 16/496,363 · Granted Aug 10, 2021

Enhanced cell search and system information acquisition

Inventors: Salvatore Talarico (Sunnyvale, CA); Qiaoyang Ye (San Jose, CA); Debdeep Chatterjee (San Jose, CA); Seunghee Han (San Jose, CA); Dae Won Lee (Portland, OR)
Assignee: Apple Inc.
H04L5/0048H04J11/0069H04L5/0053H04L27/2613H04L27/2692H04W4/70H04W56/0015H04W76/27
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Quick Facts
Patent No.
US 11,088,797
App. No.
16/496,363
Granted
Aug 10, 2021
Kind
B2
Abstract

Embodiments of efeMTC synchronization signals for enhanced cell search and enhanced system information acquisition are described. In some embodiments, an apparatus of a base station (BS) is configured to generate a length-x sequence for an efeMTC synchronization signal, the length-x sequence configured for repetition in frequency domain within 6 physical resource blocks (PRB). In some embodiments, to generate the length-x sequence, the BS may be configured to select any one index of the set of root indices {1, 2, . . . , 63}, excluding the root indices 25, 29 and 34, to correspond to a different physical-layer cell identity (PCID). In some embodiments, the BS may be configured to encode RRC signaling to include a System Information Block (SIB) comprising configuration information for transmission of the efeMTC synchronization signal, and transmit the length-x sequence as the efeMTC synchronization signal in frequency resources according to the SIB.

Claims (37)

1. An apparatus, comprising:

at least one processor configured to cause a base station (BS) to:

transmit configuration for a synchronization signal additional to a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) in a system information block;

generate a length-x sequence for the synchronization signal,

transmit the synchronization signal on consecutive symbols of a subframe, wherein the synchronization signal is repeated on a plurality of consecutive subframes, wherein resource elements of the consecutive symbols that correspond to cell-specific reference signals (CRS) remain changed.

2. The apparatus of claim 1 , wherein the additional synchronization signal is dropped in a subframe including PSS and SSS.

3. The apparatus of claim 1 , wherein the length-x sequence is initialized by a cell ID.

4. The apparatus of claim 3 , wherein the length-x sequence is further initialized by information related to update of one or more of master information block (MIB) and system information blocks (SIBs).

5. The apparatus of claim 1 , wherein the length-x sequence uses an orthogonal cover code.

6. The apparatus of claim 1 , wherein particular subframes are excluded from the plurality of consecutive subframes on which the synchronization signal is repeated.

7. The apparatus of claim 1 , wherein the length-x sequence includes one or more of a m-sequence and a gold sequence.

8. A non-transitory computer readable storage medium storing program instructions executable by at least one processor of a base station (BS) to cause the BS to:

transmit configuration for a synchronization signal additional to a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) in a system information block;

generate a length-x sequence for the synchronization signal,

transmit the synchronization signal on consecutive symbols of a subframe, wherein the synchronization signal is repeated on a plurality of consecutive subframes, wherein resource elements of the consecutive symbols that correspond to cell-specific reference signals (CRS) remain changed.

9. The non-transitory computer readable storage medium of claim 8 , wherein the additional synchronization signal is dropped in a subframe including PSS and SSS.

10. The non-transitory computer readable storage medium of claim 8 , wherein the length-x sequence is initialized by a cell ID.

11. The non-transitory computer readable storage medium of claim 10 , wherein the length-x sequence is further initialized by information related to update of one or more of master information block (MIB) and system information blocks (SIBs).

12. The non-transitory computer readable storage medium of claim 8 , wherein the length-x sequence uses an orthogonal cover code.

13. The non-transitory computer readable storage medium of claim 8 , wherein particular subframes are excluded from the plurality of consecutive subframes on which the synchronization signal is repeated.

14. The non-transitory computer readable storage medium of claim 8 , wherein the length-x sequence includes one or more of a m-sequence and a gold sequence.

15. A method, comprising:

by a base station:

transmitting configuration for a synchronization signal additional to a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) in a system information block;

generating a length-x sequence for the synchronization signal,

transmitting the synchronization signal on consecutive symbols of a subframe, wherein the synchronization signal is repeated on a plurality of consecutive subframes, wherein resource elements of the consecutive symbols that correspond to cell-specific reference signals (CRS) remain changed.

16. The method of claim 15 , wherein the additional synchronization signal is dropped in a subframe including PSS and SSS.

17. The method of claim 15 , wherein the length-x sequence is initialized by a cell ID.

18. The method of claim 17 , wherein the length-x sequence is further initialized by information related to update of one or more of master information block (MIB) and system information blocks (SIBs).

19. The method of claim 15 , wherein the length-x sequence uses an orthogonal cover code.

20. The method of claim 15 , wherein particular subframes are excluded from the plurality of consecutive subframes on which the synchronization signal is repeated.

21. A base station (BS), comprising:

at least one processor configured to cause the BS to:

transmit configuration for a synchronization signal additional to a primary synchronization signal (PSS) and a secondary synchronization signal (SSS) in a system information block;

generate a length-x sequence for the synchronization signal,

transmit the synchronization signal on consecutive symbols of a subframe, wherein the synchronization signal is repeated on a plurality of consecutive subframes, wherein resource elements of the consecutive symbols that correspond to cell-specific reference signals (CRS) remain changed.

22. The base station of claim 21 , wherein the additional synchronization signal is dropped in a subframe including PSS and SSS.

Assignments (4)
CONFIRMATORY ASSIGNMENT Recorded Mar 30, 2023
From: INTEL CORP.
To: APPLE INC.
Reel/Frame 063190/0660 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 3, 2020
From: TALARICO, SALVATORE; YE, QIAOYANG; CHATTERJEE, DEBDEEP; HAN, SEUNGHEE; LEE, DAE WON
To: INTEL IP CORPORATION
Reel/Frame 053115/0170 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053309/0140 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053051/0295 →
Continuity (3)
Provisional Application 62587657 · Nov 17, 2017
Provisional Application 62476574 · Mar 24, 2017
Related Publication 20200169363A1 · May 28, 2020