IP Library Granted Patent US 11,244,862
Granted Patent B2
US 11,244,862 · App. 16/500,942 · Granted Feb 8, 2022

Method for manufacturing semiconductor devices

Inventors: Kenji Yoshikawa (Tokyo, JP); Masato Negishi (Tokyo, JP); Masato Suzuki (Tokyo, JP); Tatsuro Yoshino (Tokyo, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H01L21/78
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Quick Facts
Patent No.
US 11,244,862
App. No.
16/500,942
Granted
Feb 8, 2022
Kind
B2
Abstract

A method for manufacturing semiconductor devices includes: forming a plurality of semiconductor devices in a first region of a primary surface of a wafer; forming a plurality of cleave initiation portions in a second region of a primary surface different from the first region; and cleaving the wafer sequentially, using the plurality of cleave initiation portions as initiation points, starting from a cleave initiation portion that is relatively difficult to cleave among the plurality of cleave initiation portions. Forming the plurality of cleave initiation portions includes forming the plurality of first grooves by etching portions of the second region. Due to this, the yield and the manufacturing efficiency for semiconductor devices can be enhanced.

Claims (41)

1. A method for manufacturing semiconductor devices, comprising:

forming a plurality of semiconductor devices in a first region of a primary surface of a wafer, the plurality of semiconductor devices being arranged along a first direction and a second direction intersecting with the first direction;

forming a plurality of cleave initiation portions in a second region of the primary surface, the second region being different from the first region, the plurality of cleave initiation portions being arranged along the second direction, the plurality of cleave initiation portions having different levels of difficulty in being cloven, forming the plurality of cleave initiation portions includes forming a plurality of first grooves by etching portions of the second region, the plurality of first grooves each extending along the first direction; and

cleaving the wafer sequentially, using the plurality of cleave initiation portions as initiation points,

wherein:

the plurality of cleave initiation portions include the plurality of first grooves;

at least one of first depths of the plurality of first grooves and first lengths of the plurality of first grooves are different, the first depths being length of the plurality of first grooves in a third direction perpendicular to the primary surface, the first lengths being lengths of the plurality of first grooves in the first direction; and

cleaving the wafer includes cleaving the wafer sequentially, using the plurality of first grooves as initiation points, starting from a first groove, wherein at least one of the first depth and the first length of the first groove is smaller than at least one of the first depth and the first length of another first groove among the plurality of first grooves.

2. The method for manufacturing semiconductor devices according to claim 1 , wherein:

at least portions of the plurality of first grooves are filled with a filling member;

forming the plurality of cleave initiation portions further includes filling the at least portions of the plurality of first grooves with the filling member, at least one of second depths and second lengths of the filling member within the plurality of first grooves are different among the plurality of cleave initiation portions, the second depths being lengths of the filling member in the third direction, the second length being lengths of the filling member in the first direction; and

the at least one of the second depths and the second lengths of the filling member increase with a decrease in the at least one of the first depths and the first lengths of the plurality of first grooves.

3. The method for manufacturing semiconductor devices according to claim 1 , wherein

cleaving the wafer includes cleaving the wafer at a center portion of the wafer in the second direction to obtain two divided wafers, and cleaving, at least once, the divided wafers at center portions of the divided wafers in the second direction.

4. The method for manufacturing semiconductor devices according to claim 1 , wherein

the at least one of the first depths and the first lengths of the plurality of first grooves gradually vary in the second direction.

5. The method for manufacturing semiconductor devices according to claim 1 , wherein

the first depths and the first lengths of the plurality of first grooves are respectively different.

6. The method for manufacturing semiconductor devices according to claim 1 , wherein:

at least portions of the plurality of first grooves are filled with a filling member;

forming the plurality of cleave initiation portions further includes filling the at least portions of the plurality of first grooves with the filling member, at least one of second depths and second lengths of the filling member within the plurality of first grooves are different among the cleave initiation portions, the second depths being lengths of the filling member in a third direction perpendicular to the primary surface, the second lengths being lengths of the filling member in the first direction; and

cleaving the wafer further includes cleaving the wafer sequentially, using the plurality of cleave initiation portions as initiation points, starting from a cleave initiation portion that is filled with the filling member the at least one of the second depth and the second length of which is greater than at least one of the second depth and the second length of the filling member filling another cleave initiation portion among the plurality of cleave initiation portions.

7. The method for manufacturing semiconductor devices according to claim 1 , wherein

the plurality of first grooves each include a V-shaped bottom portion in a cross section orthogonal to the first direction.

8. The method for manufacturing semiconductor devices according to claim 1 , wherein

the plurality of cleave initiation portions are arranged to one side and an other side of the first region in the first direction,

the plurality of first grooves arranged to the one side of the first region and the plurality of first grooves arranged to the other side of the first region are arranged along the first direction.

9. The method for manufacturing semiconductor devices according to claim 1 , wherein:

the plurality of first grooves are arranged to one side and an other side of the first region in the first direction; and

the plurality of first grooves are arranged alternately to the one side and the other side in the second direction.

10. The method for manufacturing semiconductor devices according to claim 1 , comprising forming a plurality of second grooves in the first region, wherein

the plurality of second grooves are arranged along the second direction, the plurality of second grooves each extend along the first direction, and the plurality of first grooves and the plurality of second grooves are arranged along the first direction.

11. The method for manufacturing semiconductor devices according to claim 1 , wherein:

the plurality of cleave initiation portions include end portions including tapered portions, the end portions being to a first region side; and

in a plan view of the primary surface of the wafer, the tapered portions reduce in thickness toward the first region.

12. The method for manufacturing semiconductor devices according to claim 1 , wherein

the plurality of semiconductor devices are each a semiconductor laser.

13. The method for manufacturing semiconductor devices according to claim 2 , wherein

cleaving the wafer includes cleaving the wafer at a center portion of the wafer in the second direction to obtain two divided wafers, and cleaving, at least once, the divided wafers at center portions of the divided wafers in the second direction.

14. The method for manufacturing semiconductor devices according to claim 2 , wherein

the at least one of the first depths and the first lengths of the plurality of first grooves gradually vary in the second direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2019
From: YOSHIKAWA, KENJI; NEGISHI, MASATO; SUZUKI, MASATO; YOSHINO, TATSURO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 050626/0771 →
Priority Claims (1)
JP JP2017-085398 · Apr 24, 2017 · national
Continuity (1)
Related Publication 20200111709A1 · Apr 9, 2020