IP Library Granted Patent US 10,944,476
Granted Patent B2
US 10,944,476 · App. 16/508,086 · Granted Mar 9, 2021

Optical communication interface utilizing N-dimensional double square quadrature amplitude modulation

Inventors: Jamal Riani (Fremont, CA); Sudeep Bhoja (San Jose, CA)
Assignee: INPHI CORPORATION
H04B10/27H03K9/02H04B10/25891H04B10/61H04B14/004H04L27/02H04L27/06H04L27/34
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Quick Facts
Patent No.
US 10,944,476
App. No.
16/508,086
Granted
Mar 9, 2021
Kind
B2
Abstract

The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.

Claims (17)

1. A transmitter comprising:

a receiver for receiving a data stream;

an FEC encoder comprising an encoder and a mapper for encoding the data stream; and

a modulation driver for modulating the encoded data stream;

wherein:

the encoder is configured to group bits from the data stream as most significant bits (MSBs) and leas significant bits (LSBs);

the mapper is configured to process the MSBs as data blocks; the mapper comprises an nDSQ mapper,

the encoder is further configured insert an error indication based on a parity check into the LSBs.

2. The transmitter of claim 1 wherein the LSBs are encoded with a BCH coding scheme.

3. The transmitter of claim 2 wherein the data blocks comprise nDSQ symbols.

4. The transmitter of claim 2 wherein the LSBs are encoded with an RS coding scheme.

5. The transmitter of claim 1 wherein modulation driver comprises a PAM modulation driver.

6. The transmitter of claim 1 wherein the receiver comprises a phase lock loop (PLL) for aligning the data stream.

7. The transmitter of claim 1 wherein the parity check is based on a low-density parity check (LDPC) code.

8. The transmitter of claim 1 wherein the receiver receives the data stream multiple channels.

9. The transmitter of claim 1 further wherein the nDSQ mapper is configured to perform DSQ32 coding.

10. The transmitter of claim 1 wherein the data blocks are mapped to PAM8 symbols.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2019
From: RIANI, JAMAL; BHOJA, SUDEEP
To: INPHI CORPORATION
Reel/Frame 049725/0040 →