IP Library Granted Patent US 11,127,804
Granted Patent B2
US 11,127,804 · App. 16/512,902 · Granted Sep 21, 2021

Display panel, method for manufacturing the same and display device

Inventors: Pinfan Wang (Beijing, CN); Weixin Ma (Beijing, CN); Mingche Hsieh (Beijing, CN); Fangxu Cao (Beijing, CN); Xixi Guo (Beijing, CN); Yu Feng (Beijing, CN)
Assignee: BOE TECHNOLOGY GROUP CO., LTD.
H01L27/3262H01L27/3209H01L51/0097H01L51/5237H01L51/56H01L2227/323H01L2251/5338
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Quick Facts
Patent No.
US 11,127,804
App. No.
16/512,902
Granted
Sep 21, 2021
Kind
B2
Abstract

Provided are a display panel, a method for manufacturing the same, and a display device. The display panel includes: flexible substrate; multiple thin film transistor structures arranged in an array and on the flexible substrate; and an organic layer located on the multiple thin film transistor structures. Through holes are arranged between adjacent thin film transistor structures, each through hole penetrates the organic layer and the flexible substrate, and the organic layer covers a first surface of at least one thin film transistor structure far away from the flexible substrate, and side surfaces of the at least one thin film transistor structure proximate to the corresponding through holes.

Claims (39)

1. A display panel, comprising:

a flexible substrate;

a plurality of thin film transistor structures arranged in an array and on the flexible substrate;

an organic layer located on the plurality of thin film transistor structures; and

a light-emitting structure located on a side of the organic layer away from the plurality of thin film transistor structures,

wherein through holes are between adjacent ones of the plurality of thin film transistor structures, each of the through holes penetrates the organic layer and the flexible substrate, the organic layer comprises a plurality of organic layer patterns that are spaced apart from each other by the through holes, and the flexible substrate comprises a plurality of substrate patterns that are spaced apart from each other by the through holes,

wherein the organic layer covers a first surface of at least one of the plurality of thin film transistor structures away from the flexible substrate, and covers side surfaces of the at least one thin film transistor structure proximate to the corresponding through holes, and

wherein each of the plurality of thin film transistor structures comprises a semiconductor active layer, an insulation layer, a gate electrode, a gate insulation layer, a source electrode, and a drain electrode, the insulation layer is between the semiconductor active layer and the gate electrode,

wherein the semiconductor active layer, the insulation layer, the gate electrode, the gate insulation layer, the source electrode, and the drain electrode of each thin film transistor structure are surrounded by a corresponding one of the plurality of organic layer patterns and a corresponding one of the plurality of substrate patterns, for each of the plurality of organic layer patterns, the organic layer directly contacts the insulation layer, and the organic layer pattern and the semiconductor active layer are spaced apart by the insulation layer.

2. The display panel according to claim 1 , wherein a side surface of at least one of the through holes is perpendicular to the flexible substrate.

3. The display panel according to claim 1 , wherein each of the plurality of the organic layer patterns is a U-shaped structure for surrounding a first surface and two side surfaces of a corresponding one of the plurality of thin film transistor structures.

4. The display panel according to claim 3 , wherein each thin film transistor structure is provided with a plurality of reinforcing elements, and the plurality of reinforcing elements corresponding to the each thin film transistor structure is symmetrically distributed about a central axis of the each thin film transistor structure.

5. The display panel according to claim 4 , further comprising: a plurality of convex structures on the organic layer; wherein a plurality of convex structures is on each thin film transistor structure, and

the plurality of convex structures corresponding to the each thin film transistor structure are asymmetrically distributed about a neutral axis of the each thin film transistor structure.

6. The display panel according to claim 4 , wherein at least part of wires comprised in each thin film transistor structure is located in an inner bending region formed when the display panel is bent.

7. The display panel according to claim 6 , further comprising a strain sensing wire for detecting a bending degree of the display panel,

wherein the strain sensing wire is located in an outer bending region formed when the display panel is bent, and the inner bending region and the outer bending region are separated by the neutral axis.

8. The display panel according to claim 3 , wherein each of the plurality of organic layer patterns is in direct contact with a first surface and two side surfaces of a corresponding one of the plurality of thin film transistor structures.

9. The display panel according to claim 1 , further comprising: a plurality of reinforcing elements on the organic layer,

wherein the plurality of reinforcing elements is in a peripheral region of at least one of the plurality of thin film transistor structures.

10. The display panel according to claim 9 , wherein the plurality of reinforcing elements covers a side surface of the organic layer in the through holes, or cover a side surface of the organic layer in the through holes and a side surface of the flexible substrate in the through holes.

11. The display panel according to claim 10 , wherein an orthographic projection of the organic layer onto the flexible substrate overlaps the flexible substrate.

12. The display panel according to claim 9 , wherein each of the plurality of reinforcing elements is made of organic material, and

wherein the plurality of reinforcing elements corresponding to each thin film transistor structure are separated from each other and are distributed on two sides of a corresponding one of the plurality of organic layer patterns.

13. The display panel according to claim 9 , wherein each of the plurality of reinforcing elements comprises a positive truncated pyramid and an inverted truncated pyramid stacked in a direction perpendicular to the substrate.

14. The display panel according to claim 1 , further comprising an encapsulation layer on the organic layer, wherein the encapsulation layer covers surfaces of the light-emitting structure and the organic layer away from the flexible substrate, and covers a side surface of the flexible substrate proximate to the through holes, and a side surface of the organic layer proximate to the through holes.

15. The display panel according to claim 14 , wherein the side surface of the encapsulation layer proximate to the through holes is perpendicular to the flexible substrate, and the encapsulation layer comprises an inorganic thin film encapsulation layer and an organic thin film encapsulation layer alternately stacked.

16. A display device, comprising the display panel according to claim 1 .

17. A method for manufacturing, a display panel, comprising:

manufacturing a plurality of thin film transistor structures arranged in an array and on a flexible substrate;

manufacturing an organic layer on the plurality of thin film transistor structures, wherein the organic layer covers a first surface of at least one of the plurality of thin film transistor structures away from the flexible substrate;

forming through holes between adjacent ones of the plurality of thin film transistor structures, wherein each of the through holes penetrates the organic layer and the flexible substrate, and the organic layer covers side surfaces of the at least one thin film transistor structure proximate to the corresponding through holes; and

forming a light-emitting structure on a side of the organic layer away from the plurality of thin film transistor structures, wherein the organic layer comprises a plurality of organic layer patterns that are spaced apart from each other by the through holes, and the flexible substrate comprises a plurality of substrate patterns that are spaced apart from each other by the through holes, and

wherein each of the plurality of thin film transistor structures comprises a semiconductor active layer, an insulation layer, a gate electrode, a gate insulation layer, a source electrode, and a drain electrode, the insulation layer is between the semiconductor active layer and the gate electrode,

wherein the semiconductor active layer, the insulation layer, the gate electrode, the gate insulation laver, the source electrode, and the drain electrode of each thin film transistor structure are surrounded by a corresponding one of the plurality of organic layer patterns and a corresponding one of the plurality of substrate patterns, for each of the plurality of organic layer patterns, the organic layer pattern directly contacts the insulation layer, and the organic layer pattern and the semiconductor active layer are spaced apart by the insulation laver.

18. The method according to claim 17 , wherein after forming the through holes between adjacent ones of the plurality of thin film transistor structures, the method further comprises:

manufacturing a plurality of reinforcing elements on the organic layer, wherein the plurality of reinforcing elements is in a peripheral region of at least one of the plurality of thin film transistor structures.

19. The method according to claim 17 , wherein after forming the through holes between adjacent ones of the plurality of thin film transistor structures, the method further comprises:

manufacturing a plurality of convex structures on the organic layer, wherein the plurality of convex structures is in a peripheral region of at least one of the plurality of thin film transistor structure, and a plurality of convex structures corresponding to each thin film transistor structure is asymmetrically distributed about a neutral axis of the each thin film transistor structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2022
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 060826/0252 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2019
From: FENG, YU; HSIEH, MINGCHE; CAO, FANGXU; GUO, XIXI; WANG, PINFAN; MA, WEIXIN
To: BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 049834/0885 →
Priority Claims (1)
CN 201810785695.7 · Jul 17, 2018 · national
Continuity (1)
Related Publication 20200027940A1 · Jan 23, 2020