IP Library Granted Patent US 10,818,697
Granted Patent B2
US 10,818,697 · App. 16/515,057 · Granted Oct 27, 2020

Semiconductor device, display device, and method of producing semiconductor device

Inventors: Masahiko Suzuki (Sakai, JP); Tohru Daitoh (Sakai, JP); Hajime Imai (Sakai, JP); Tetsuo Kikuchi (Sakai, JP); Setsuji Nishimiya (Sakai, JP); Teruyuki Ueda (Sakai, JP); Masamitsu Yamanaka (Sakai, JP); Kengo Hara (Sakai, JP)
Assignee: SHARP KABUSHIKI KAISHA
H01L27/1225G02F1/1368G02F1/136209G02F1/136286H01L27/124H01L27/127H01L27/1251G02F2001/13685G02F2202/104
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Quick Facts
Patent No.
US 10,818,697
App. No.
16/515,057
Granted
Oct 27, 2020
Kind
B2
Abstract

A semiconductor device includes a first TFT, a first source-side connection section that is formed from a part of a second metal film and connected to a first source region, a first drain-side connection section that is formed from a part of the second metal film and connected to a first drain region, a second TFT that is driven by the first TFT, a second source-side connection section that is formed from a part of a first metal film and connected to a second source region, and a second drain-side connection section that is formed from a part of the first metal film or a second transparent electrode film and connected to a second drain region.

Claims (47)

1. A semiconductor device comprising:

a first semiconductor film;

a first insulation film disposed on an upper layer side of the first semiconductor film;

a first metal film disposed on an upper layer side of the first insulation film;

a second insulation film disposed on an upper layer side of the first metal film;

a second semiconductor film disposed on an upper layer side of the second insulation film;

a third insulation film disposed on an upper layer side of the second semiconductor film;

a second metal film disposed on an upper layer side of the third insulation film;

a fourth insulation film disposed on an upper layer side of the second metal film;

a transparent electrode film disposed on an upper layer side with respect to the fourth insulation film;

a first TFT including

a first gate electrode that is formed from a part of the first metal film,

a first channel region that is formed from a part of the first semiconductor film and disposed to overlap the first gate electrode,

a first source region that is formed from a part of the first semiconductor film and continuous to the first channel region, and

a first drain region that is formed from a part of the first semiconductor film and continuous from a section of the first channel region opposite from a first source region side;

a first source-side connection section that is formed from a part of the second metal film and disposed to overlap the first source region and connected to the first source region through first source-side contact holes formed in the first insulation film, the second insulation film, and the third insulation film;

a first drain-side connection section that is formed from a part of the second metal film and disposed to overlap the first drain region and connected to the first drain region through first drain-side contact holes formed in the first insulation film, the second insulation film, and the third insulation film;

a second TFT that is driven by the first TFT and including

a second gate electrode that is formed from a part of the second metal film,

a second channel region that is formed from a part of the second semiconductor film and disposed to overlap the second gate electrode,

a second source region that is formed from a part of the second semiconductor film and continuous to the second channel region, and

a second drain region that is formed from a part of the second semiconductor film and continuous from a section of the second channel region opposite from a second source region side;

a second source-side connection section that is formed from a part of the first metal film and disposed to overlap the second source region and connected to the second source region through a second source-side contact hole formed in the second insulation film; and

a second drain-side connection section that is formed from a part of the first metal film or the transparent electrode film and disposed to overlap the second drain region and connected to the second drain region through a second drain-side contact hole formed in the second insulation film or at least the fourth insulation film.

2. The semiconductor device according to claim 1 , further comprising a first drain opposite-side connection section that is formed from the first metal film and connected to a section of the first drain-side connection section opposite from a first drain region side through first drain opposite-side contact holes formed in the second insulation film and the third insulation film.

3. The semiconductor device according to claim 1 , wherein the first semiconductor film is a polycrystalline silicone film.

4. The semiconductor device according to claim 1 , wherein the second semiconductor film is an oxide semiconductor film, and the second source region and the second drain region are sections of the second semiconductor film whose resistance is lowered.

5. A display device comprising:

the semiconductor device according to claim 1 ;

a display region displaying an image; and

a non-display region displaying no image.

6. The display device according to claim 5 , wherein

at least the second TFT, the second source-side connection section, and the second drain-side connection section are arranged in the display region, and

the second drain-side connection section is formed from the transparent electrode film and forms a pixel electrode.

7. The display device according to claim 5 , wherein at least the second TFT is arranged in the display region, the display device further comprising:

a lower layer-side insulation film disposed on a lower layer side of the first semiconductor film;

a lower layer-side metal film disposed on a lower layer side of the lower layer-side insulation film; and

a light blocking section that is formed from the lower layer-side metal film and disposed to overlap at least the second channel region.

8. The display device according to claim 7 , wherein the light blocking section is a lower layer-side gate electrode that is configured to drive the second TFT.

9. The display device according to claim 5 , wherein at least the first TFT is arranged in the non-display region, the display device further comprising:

a lower layer-side insulation film disposed on a lower layer side of the first semiconductor film;

a lower layer-side metal film disposed on a lower layer side of the lower layer-side insulation film; and

a light blocking section that is formed from the lower layer-side metal film and disposed to overlap at least the first channel region.

10. The display device according to claim 5 , wherein at least the first TFT is arranged in the display region, the display device further comprising:

a lower layer-side insulation film disposed on a lower layer side of the first semiconductor film;

a lower layer-side metal film disposed on a lower layer side of the lower layer-side insulation film; and

a light blocking section that is formed from the lower layer-side metal film and disposed to overlap at least the first channel region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2019
From: SUZUKI, MASAHIKO; DAITOH, TOHRU; IMAI, HAJIME; KIKUCHI, TETSUO; NISHIMIYA, SETSUJI; UEDA, TERUYUKI; YAMANAKA, MASAMITSU; HARA, KENGO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 049785/0241 →
Continuity (2)
Provisional Application 62714802 · Aug 6, 2018
Related Publication 20200043955A1 · Feb 6, 2020
Cited By (1)
US 12,437,710