IP Library Granted Patent US 11,476,229
Granted Patent B2
US 11,476,229 · App. 16/515,274 · Granted Oct 18, 2022

Semiconductor device manufacturing method

Inventor: Chikara Miyazaki (Mie, JP)
Assignee: Kioxia Corporation
H01L24/81B23K1/008B23K1/20B23K2101/40H01L2224/8121H01L2224/81022H01L2224/81048H01L2224/81065H01L2224/81091H01L2224/81815
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Quick Facts
Patent No.
US 11,476,229
App. No.
16/515,274
Granted
Oct 18, 2022
Kind
B2
Abstract

According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.

Claims (38)

1. A semiconductor device manufacturing method comprising:

forming a stacked body by stacking a first semiconductor elemental device and a second semiconductor elemental device, the first semiconductor elemental device including a first bump electrode, a first oxide film formed on a lateral side of the first bump electrode, and a solder bump provided on the first bump electrode, the second semiconductor elemental device including a second bump electrode and a second oxide film formed on a lateral side of the second bump electrode, the stacked body being formed by temporarily fixing the solder bump and the second bump electrode to each other;

exhausting gas from an inside of a furnace in which the stacked body is placed;

performing a reduction process of removing a third oxide film on a surface of the solder bump without removing the first oxide film and the second oxide film, the reduction process being performed by setting a temperature of the inside of the furnace to fall within a range of a reduction temperature or more at which a carboxylic acid expresses a reduction action, and less than a melting temperature at which the solder bump is melted, and concurrently introducing into the inside of the furnace a reducing gas containing a carboxylic acid gas and an inactive gas such that the inside of the furnace has a first carboxylic acid gas concentration;

performing a temperature increase process of raising the temperature of the inside of the furnace up to the melting temperature, and concurrently lowering a carboxylic acid gas concentration of the inside of the furnace down to a second carboxylic acid gas concentration; and

performing a melting process of connecting the solder bump and the second bump electrode to each other without removing the first oxide film and the second oxide film, the melting process being performed by keeping the temperature of the inside of the furnace at the melting temperature or more to melt the solder bump,

wherein the second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on part of the third oxide film of the solder bump bitten in between the solder bump and the second bump electrode, and

the inside of the furnace has the second carboxylic acid gas concentration at least at a start point of the melting process.

2. The semiconductor device manufacturing method according to claim 1 , wherein the inside of the furnace has a carboxylic acid gas concentration equal to the second carboxylic acid gas concentration at an end point of the melting process.

3. The semiconductor device manufacturing method according to claim 1 , wherein the inside of the furnace has a carboxylic acid gas concentration less than the second carboxylic acid gas concentration at an end point of the melting process.

4. The semiconductor device manufacturing method according to claim 1 , wherein a pressure of the inside of the furnace is kept at a predetermined pressure lower than atmospheric pressure during a period from the reduction process to the melting process.

5. The semiconductor device manufacturing method according to claim 4 , wherein the pressure falls within a range of 1.3×104 Pa or more and 8×104 Pa or less.

6. The semiconductor device manufacturing method according to claim 1 , wherein the first carboxylic acid gas concentration is 0.6 vol % or more and 9.2 vol % or less.

7. The semiconductor device manufacturing method according to claim 6 , wherein the first carboxylic acid gas concentration is 2.8 vol % to 9.2 vol %, and the second carboxylic acid gas concentration is 0.6 vol % to 2.8 vol %.

8. The semiconductor device manufacturing method according to claim 1 , wherein each of the first bump electrode and the second bump electrode is made of a single metal selected from the group consisting of Ni, Cu, Au and Pd, or a composite film formed by stacking two or more metals selected from the group consisting of Ni, Cu, Au and Pd, and

the solder bump is made of Sn or an alloy containing Sn.

9. The semiconductor device manufacturing method according to claim 1 , wherein the carboxylic acid gas contains a carboxylic acid that is an aliphatic monovalent or divalent lower carboxylic acid.

10. The semiconductor device manufacturing method according to claim 9 , wherein the lower carboxylic acid contains at least one selected from the group consisting of formic acid, acetic acid, acrylic acid, propionic acid, oxalic acid, succinic acid, and malonic acid.

11. A semiconductor device manufacturing method comprising:

forming a stacked body by stacking a first semiconductor elemental device and a second semiconductor elemental device, the first semiconductor elemental device including a first bump electrode, a first oxide film formed on a lateral side of the first bump electrode, and a solder bump provided on the first bump electrode, the second semiconductor elemental device including a second bump electrode and a second oxide film formed on a lateral side of the second bump electrode, the stacked body being formed by temporarily fixing the solder bump and the second bump electrode to each other;

exhausting gas from an inside of a furnace in which the stacked body is placed;

performing a reduction process of removing a third oxide film on a surface of the solder bump without removing the first oxide film and the second oxide film, the reduction process being performed by raising a temperature of the inside of the furnace up to a melting temperature at which the solder bump is melted, and concurrently introducing a carboxylic acid gas and an inactive gas into the inside of the furnace;

performing a melting process of connecting the solder bump and the second bump electrode to each other without removing the first oxide film and the second oxide film, the melting process being performed by keeping the temperature of the inside of the furnace at the melting temperature or more to melt the solder bump; and

lowering the temperature of the inside of the furnace, and exhausting gas from the inside of the furnace, wherein

the reduction process includes

introducing into the inside of the furnace the carboxylic acid gas and the inactive gas such that the inside of the furnace has a first carboxylic acid gas concentration after the exhausting gas from the inside of the furnace, and

controlling introduction amounts of the carboxylic acid gas and the inactive gas, by lowering stepwise a concentration of the carboxylic acid gas to be a second carboxylic acid gas concentration lower than the first carboxylic acid gas concentration at a start point of the melting process, and

the second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on part of the third oxide film of the solder bump bitten in between the solder bump and the second bump electrode.

12. The semiconductor device manufacturing method according to claim 11 , wherein the inside of the furnace has a carboxylic acid gas concentration equal to the second carboxylic acid gas concentration at an end point of the melting process.

13. The semiconductor device manufacturing method according to claim 11 , wherein the inside of the furnace has a carboxylic acid gas concentration less than the second carboxylic acid gas concentration at an end point of the melting process.

14. The semiconductor device manufacturing method according to claim 11 , wherein a pressure of the inside of the furnace is kept at a predetermined pressure lower than atmospheric pressure during a period from the reduction process to the melting process.

15. The semiconductor device manufacturing method according to claim 14 , wherein the pressure falls within a range of 1.3×104 Pa or more and 8×104 Pa or less.

16. The semiconductor device manufacturing method according to claim 11 , wherein the first carboxylic acid gas concentration is 0.6 vol % or more and 9.2 vol % or less.

17. The semiconductor device manufacturing method according to claim 16 , wherein the first carboxylic acid gas concentration is 2.8 vol % to 9.2 vol %, and the second carboxylic acid gas concentration is 0.6 vol % to 2.8 vol %.

18. The semiconductor device manufacturing method according to claim 11 , wherein each of the first bump electrode and the second bump electrode is made of a single metal selected from the group consisting of Ni, Cu, Au and Pd, or a composite film formed by stacking two or more metals selected from the group consisting of Ni, Cu, Au and Pd, and

the solder bump is made of Sn or an alloy containing Sn.

19. The semiconductor device manufacturing method according to claim 11 , wherein the carboxylic acid gas contains a carboxylic acid that is an aliphatic monovalent or divalent lower carboxylic acid.

20. The semiconductor device manufacturing method according to claim 19 , wherein the lower carboxylic acid contains at least one selected from the group consisting of formic acid, acetic acid, acrylic acid, propionic acid, oxalic acid, succinic acid, and malonic acid.

Assignments (2)
CHANGE OF NAME Recorded Jan 21, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058805/0801 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2019
From: MIYAZAKI, CHIKARA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 049788/0815 →
Priority Claims (1)
JP JP2019-048423 · Mar 15, 2019 · national
Continuity (1)
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