IP Library Granted Patent US 11,239,371
Granted Patent B2
US 11,239,371 · App. 16/518,437 · Granted Feb 1, 2022

Thin-film transistor including source-drain electrodes connected to a semiconducting film and extending through a semiconductor auxiliary film

Inventors: Yasuhiro Terai (Tokyo, JP); Naoki Asano (Tokyo, JP); Takashi Maruyama (Tokyo, JP)
Assignee: JOLED INC.
H01L29/7869H01L21/02565H01L21/02631H01L29/4175H01L29/41733H01L29/66969H01L29/78696H01L21/0274H01L21/02164H01L21/02271H01L21/465H01L29/45
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Quick Facts
Patent No.
US 11,239,371
App. No.
16/518,437
Granted
Feb 1, 2022
Kind
B2
Abstract

A semiconductor device includes a semiconductor film, an interlayer insulating film, a source-drain electrode, and a semiconductor auxiliary film. The semiconductor film includes an oxide semiconductor material and has a channel region and a low-resistance region. The low-resistance region has an electric resistance lower than an electric resistance of the channel region. The interlayer insulating film covers the semiconductor film and has a through-hole opposed to the low-resistance region. The source-drain electrode includes a source electrode and a drain electrode and is electrically coupled to the semiconductor film through the through-hole. The semiconductor auxiliary film is in contact with the low-resistance region of the semiconductor film, reduces an electric resistance of the semiconductor film, and has a first opening at least on a part of a portion opposed to the through-hole.

Claims (35)

1. A semiconductor device comprising:

a semiconductor film including an oxide semiconductor material and having a channel region and a low-resistance region, the low-resistance region having an electric resistance lower than an electric resistance of the channel region;

an interlayer insulating film covering the semiconductor film and having a through-hole opposed to the low-resistance region;

a source-drain electrode including a source electrode and a drain electrode and being electrically coupled to the semiconductor film through the through-hole; and

a semiconductor auxiliary film being in contact with the low-resistance region of the semiconductor film, reducing an electric resistance of the semiconductor film, having a first opening at least on a part of a portion opposed to the through-hole, and a bottom-most surface of the semiconductor film is co-planar with a bottom-most surface of the semiconductor auxiliary film.

2. The semiconductor device according to claim 1 , wherein

the first opening is provided on the part of the portion opposed to the through-hole.

3. The semiconductor device according to claim 2 , wherein

the first opening comprises a plurality of first openings, and

the plurality of first openings is provided on the portion opposed to the through-hole.

4. The semiconductor device according to claim 1 , wherein the first opening is provided on an entirety of the portion opposed to the through-hole.

5. The semiconductor device according to claim 1 , wherein the semiconductor film has a second opening at least on the part of the portion opposed to the through-hole.

6. The semiconductor device according to claim 1 , wherein the source-drain electrode is in contact with an inner face of the first opening of the semiconductor auxiliary film.

7. The semiconductor device according to claim 1 , wherein the semiconductor auxiliary film includes a metal or a metal oxide.

8. The semiconductor device according to claim 1 , wherein the semiconductor auxiliary film includes indium tin oxide or indium zinc oxide.

9. The semiconductor device according to claim 1 , further comprising:

a substrate;

a gate electrode opposed to the channel region; and

a gate insulating film provided between the gate electrode and the semiconductor film,

the semiconductor auxiliary film, the semiconductor film, the gate insulating film, and the gate electrode being provided on the substrate in this order.

10. The semiconductor device according to claim 1 , wherein the interlayer insulating film includes a metal oxide film in contact with the low-resistance region of the semiconductor film.

11. The semiconductor device according to claim 1 , wherein the semiconductor auxiliary film is provided in a selective region opposed to the low-resistance region of the semiconductor film having the channel region and the low-resistance region.

12. The semiconductor device of claim 1 , further comprising a substrate, wherein the channel region directly contacts the substrate.

13. The semiconductor device of claim 1 , wherein the semiconductor film extends along an entirety of a sidewall of the semiconductor auxiliary film.

14. The semiconductor device of claim 1 , wherein a region below the channel region is free of the semiconductor auxiliary film.

15. The semiconductor device of claim 1 , wherein a thickness of the semiconductor film over the semiconductor auxiliary film is less than a thickness of the channel region.

16. A display with a display element and a semiconductor device configured to drive the display element, the semiconductor device comprising:

a semiconductor film including an oxide semiconductor material and having a channel region and a low-resistance region, the low-resistance region having an electric resistance lower than an electric resistance of the channel region;

an interlayer insulating film covering the semiconductor film and having a through-hole opposed to the low-resistance region;

a source-drain electrode including a source electrode and a drain electrode and being electrically coupled to the semiconductor film through the through-hole; and

a semiconductor auxiliary film being in contact with the low-resistance region of the semiconductor film, reducing an electric resistance of the semiconductor film, having a first opening at least on a part of a portion opposed to the through-hole, and the semiconductor film extends along an entirety of a sidewall of the semiconductor auxiliary film.

17. The display of claim 16 , further comprising a substrate, wherein the channel region directly contacts the substrate.

18. The display of claim 16 , wherein a bottom-most surface of the semiconductor film is co-planar with a bottom-most surface of the semiconductor auxiliary film.

19. The display of claim 16 , wherein a region below the channel region is free of the semiconductor auxiliary film.

20. The display of claim 16 , wherein a thickness of the semiconductor film over the semiconductor auxiliary film is less than a thickness of the channel region.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2019
From: TERAI, YASUHIRO; ASANO, NAOKI; MARUYAMA, TAKASHI
To: JOLED INC.
Reel/Frame 049825/0139 →
Priority Claims (1)
JP JP2019-025794 · Feb 15, 2019 · national
Continuity (1)
Related Publication 20200266300A1 · Aug 20, 2020