IP Library Granted Patent US 10,879,660
Granted Patent B1
US 10,879,660 · App. 16/523,091 · Granted Dec 29, 2020

Asymmetric high-speed interconnect routing interposer

Inventors: Isaac Qin Wang (Austin, TX); Jing Zhang (Cedar Park, TX)
Assignee: Dell Products, L.P.
H01R33/945G06F13/4009G06F13/4027
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Quick Facts
Patent No.
US 10,879,660
App. No.
16/523,091
Granted
Dec 29, 2020
Kind
B1
Abstract

An information handling system includes a first device having a first data communication interface connected to a first socket area of a socket. A second device includes a second data communication interface connected to a second socket area of the socket. A host processor includes a third data communication interface connected to a third socket area of the socket. When an interposer is installed into the socket in a first orientation, the interposer connects the first data communication interface to the third data communication interface. When the interposer is installed into the socket in a second orientation, the interposer connects the first data communication interface to the second data communication interface.

Claims (40)

1. An information handling system, comprising:

a socket affixed to a printed circuit board of the information handling system;

a first device including a first data communication interface connected to a first socket area of the socket;

a second device including a second data communication interface connected to a second socket area of the socket;

a first host processor including a third data communication interface connected to a third socket area of the socket; and

an interposer that, when installed into the socket in a first orientation, connects the first data communication interface to the third data communication interface, and when installed into the socket in a second orientation, connects the first data communication interface to the second data communication interface.

2. The information handling system of claim 1 , further comprising:

a second host processor including a fourth data communication interface connected to a fourth socket area of the socket, wherein, when the interposer is installed into the socket in the first orientation, the interposer connects the second data communication interface to the fourth data communication interface.

3. The information handling system of claim 2 , wherein, when the interposer is installed into the socket in the second orientation, the second and fourth data communication interfaces are not connected to any device of the information handling system.

4. The information handling system of claim 2 , wherein:

the first device further includes a fifth data communication interface connected to the first host processor; and

the second device further includes a sixth data communication interface connected to the second host processor.

5. The information handling system of claim 4 , wherein the fifth and sixth data communication interfaces are routed via the socket when the interposer is installed into the socket in both the first and second orientations.

6. The information handling system of claim 1 , wherein:

the socket includes a first key way and a second key way; and

the interposer includes a key that interfaces with the first key way when the interposer is installed into the socket in the first orientation, and that interfaces with the second key way when the interposer is installed into the socket in the second orientation.

7. The information handling system of claim 6 , wherein the first and second key ways include first and second barrels, and the key includes a pin.

8. The information handling system of claim 6 , wherein the first and second key ways include first and second slots, and the key includes a tab.

9. The information handling system of claim 1 , wherein the socket and the interposer include mating circuit connector halves of a pin-and-barrel type connector.

10. The information handling system of claim 1 , wherein the socket and the interposer include mating circuit connector halves of a bump-and-pad type connector.

11. A method, comprising:

affixing a socket to a printed circuit board of an information handling system;

connecting a first data communication interface of a first device to a first socket area of the socket;

connecting a second data communication interface of a second device to a second socket area of the socket;

connecting a third data communication interface of a first host processor to a third socket area of the socket;

installing, into the socket, an interposer in a first orientation, wherein when installed into the socket in the first orientation, the interposer connects the first data communication interface to the third data communication interface; and

installing, into the socket, the interposer in a second orientation, wherein, when installed into the socket in the second orientation, the interposer connects the first data communication interface to the second data communication interface.

12. The method of claim 11 , further comprising:

connecting a fourth data communication interface of a second host processor to a fourth socket area of the socket, wherein, when the interposer is installed into the socket in the first orientation, the interposer connects the second data communication interface to the fourth data communication interface.

13. The method of claim 12 , wherein, when the interposer is installed into the socket in the second orientation, the third and fourth data communication interfaces are not connected to any device of the information handling system.

14. The method of claim 12 , wherein:

the first device further includes a fifth data communication interface connected to the first host processor; and

the second device further includes a sixth data communication interface connected to the second host processor.

15. The method of claim 14 , wherein the fifth and sixth data communication interfaces are routed via the socket when the interposer is installed into the socket in both the first and second orientations.

16. The method of claim 11 , wherein:

the socket includes a first key way and a second key way; and

the interposer includes a key that interfaces with the first key way when the interposer is installed into the socket in the first orientation, and that interfaces with the second key way when the interposer is installed into the socket in the second orientation.

17. The method of claim 16 , wherein the first and second key ways include first and second barrels, and the key includes a pin.

18. The method of claim 16 , wherein the first and second key ways include first and second slots, and the key includes a tab.

19. The method of claim 11 , wherein the socket and the interposer include mating circuit connector halves of a pin-and-barrel type connector or of a bump-and-pad type connector.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053311/0169) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0742 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (050724/0571) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060436/0088 →
RELEASE OF SECURITY INTEREST AT REEL 050406 FRAME 421 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 058213/0825 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 053311/0169 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2019
From: WANG, ISAAC QIN; ZHANG, JING
To: DELL PRODUCTS, LP
Reel/Frame 051024/0907 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Oct 15, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 050724/0571 →
SECURITY AGREEMENT Recorded Sep 17, 2019
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 050406/0421 →