IP Library Granted Patent US 11,150,912
Granted Patent B2
US 11,150,912 · App. 16/524,407 · Granted Oct 19, 2021

Apparatus, method and program for legacy boot processing

Inventor: Masazumi Tachibana (Chiba, JP)
Assignee: FUJITSU LIMITED
G06F9/4408G06F9/441G06F12/06G06F12/10G06F13/14G06F2213/0026
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Quick Facts
Patent No.
US 11,150,912
App. No.
16/524,407
Granted
Oct 19, 2021
Kind
B2
Abstract

An apparatus includes a plurality of root ports serving as roots of bus connection of a plurality of devices including boot devices from which legacy boot is executed to boot an operating system (OS). A processor included in the apparatus identifies a single boot device among the boot devices and a single root port connected to the single boot device, and allocates, as memory addresses to be used for memory mapped input and output, memory addresses with a bit width available during the legacy boot to devices connected to the identified single root port. The processor determines whether the memory addresses have been allocated to all devices connected to the single root port, and executes the legacy boot to boot the OS from the single boot device when the memory addresses have been allocated to all the devices connected to the single root port.

Claims (35)

1. An information processing apparatus comprising:

a plurality of root ports serving as roots of bus connection of a plurality of devices including boot devices from which legacy boot is executed to boot an operating system (OS); and

a processor configured to perform a process including:

identifying a single boot device among the boot devices and a single root port connected to the single boot device,

allocating, as memory addresses to be used for memory mapped input and output, memory addresses with a bit width available during the legacy boot to devices connected to the identified single root port,

determining whether the memory addresses have been allocated to all devices connected to the single root port, and

executing the legacy boot to boot the OS from the single boot device when the memory addresses have been allocated to all the devices connected to the single root port, wherein

when the legacy boot of the OS fails, the processor performs the process on another boot device among the boot devices.

2. The information processing apparatus of claim 1 , wherein:

the processor is further configured to:

determine whether memory addresses with the bit width have been allocated to all devices included in the information processing apparatus when the information processing apparatus is turned on, and

identify the single root port when there exists a device to which a memory address with the bit width has not been allocated.

3. The information processing apparatus of claim 1 , further comprising:

a memory configured to store boot management information including information of the plurality of root ports, information defining the boot devices, and information indicating priorities of the boot devices, wherein

the processor identifies the single root port, based on the boot management information.

4. The information processing apparatus of claim 1 , wherein the devices are PCI devices.

5. The information processing apparatus of claim 1 , wherein the plurality of devices are arranged such that at least one boot device is connected to each of the plurality of root ports.

6. A method performed by an information processing apparatus including a plurality of root ports serving as roots of bus connection of a plurality of devices including boot devices from which legacy boot is executed to boot an operating system (OS), the method comprising:

identifying a single boot device among the boot devices and a single root port connected to the single boot device,

allocating, as memory addresses to be used for memory mapped input and output, memory addresses with a bit width available during the legacy boot to devices connected to the identified single root port,

determining whether the memory addresses have been allocated to all devices connected to the single root port, and

executing the legacy boot to boot the OS from the single boot device when the memory addresses have been allocated to all the devices connected to the single root port,

when the executing the legacy boot of the OS fails, repeating the identifying, allocating, determining, and executing on another boot device among the boot devices.

7. The method of claim 6 , further comprising:

determining whether memory addresses with the bit width have been allocated to all devices included in the information processing apparatus when the information processing apparatus is turned on; and

identifying the single root port when there exists a device to which a memory address with the bit width has not been allocated.

8. A non-transitory, computer-readable recording medium having stored therein a program for causing a computer to execute a procedure comprising performing a process including:

identifying a single boot device among the boot devices and a single root port connected to the single boot device,

allocating, as memory addresses to be used for memory mapped input and output, memory addresses with a bit width available during the legacy boot to devices connected to the identified single root port,

determining whether the memory addresses have been allocated to all devices connected to the single root port, and

executing the legacy boot to boot the OS from the single boot device when the memory addresses have been allocated to all the devices connected to the single root port,

when the executing the legacy boot of the OS fails, performing the process on another boot device among the boot devices.

9. The non-transitory, computer-readable recording medium of claim 8 , the procedure further comprising:

determining whether memory addresses with the bit width have been allocated to all devices included in the information processing apparatus when the information processing apparatus is turned on; and

identifying the single root port when there exists a device to which a memory address with the bit width has not been allocated.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ORIGINAL COVER SHEET BY REMOVING PATENT NUMBER 10586039 PREVIOUSLY RECORDED ON REEL 69272 FRAME 546. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 1, 2025
From: FUJITSU LIMITED
To: FSAS TECHNOLOGIES INC.
Reel/Frame 070764/0091 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2024
From: FUJITSU LIMITED
To: FSAS TECHNOLOGIES INC.
Reel/Frame 069272/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2019
From: TACHIBANA, MASAZUMI
To: FUJITSU LIMITED
Reel/Frame 049911/0029 →
Priority Claims (1)
JP JP2018-148530 · Aug 7, 2018 · national
Continuity (1)
Related Publication 20200050463A1 · Feb 13, 2020