Method and system for split voltage domain transmitter circuits
View Patent ↗Methods and systems for split voltage domain transmitter circuits may include a two-branch output stage including a plurality of CMOS transistors, with each branch of the two-branch output stage comprising two stacked CMOS inverter pairs. The two stacked CMOS inverter pairs of a given branch are configured to drive a respective load, in phase opposition to the other branch. A pre-driver circuit is configured to receive a differential modulating signal and output, to respective inputs of the two stacked CMOS inverters, two synchronous differential voltage drive signals having a swing of half the supply voltage and being DC-shifted by half of the supply voltage with respect to each other. The load may include a series of diodes that are driven in differential mode via the drive signals. An optical signal may be modulated via the diodes.
1. An electro-optical modulator interface comprising:
one or more circuits in an integrated circuit, said one or more circuits operable to:
generate a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier;
communicate the pair of signals to stacked inverters; and
amplify the pair of signals using said stacked inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said partial volatage domains is equal to a supply voltage of said integrated circuit.
2. The electro-optical modulator interface according to claim 1 , wherein said one or more circuits drives a series of diodes in differential mode via said amplified signals.
3. The electro-optical modulator interface according to claim 2 , comprising modulating an optical signal via said series of diodes.
4. The electro-optical modulator interface according to claim 2 , wherein said series of diodes are integrated in a Mach-Zehnder modulator.
5. The electro-optical modulator interface according to claim 2 , wherein said series of diodes are connected in a distributed configuration.
6. The electro-optical modulator interface according to claim 1 , comprising communicating said amplified signals to said stacked inverters via transmission lines.
7. The electro-optical modulator interface according to claim 6 , wherein said transmission lines are even-mode coupled.
8. The electro-optical modulator interface according to claim 1 , comprising generating said partial voltage domains via stacked source follower circuits.
9. The electro-optical modulator interface according to claim 1 , comprising generating a voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.
10. A method for processing signals, the method comprising:
in an integrated circuit:
generating a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier;
communicating the pair of signals to stacked inverters; and
amplifying the pair of signals using said stacked inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said partial voltage domains is equal to a supply voltage of said integrated circuit.
11. The method according to claim 10 , comprising driving a series of diodes in differential mode via said amplified signals.
12. The method according to claim 11 , wherein said integrated circuit modulates an optical signal via said series of diodes.
13. The method according to claim 11 , wherein said series of diodes are integrated in a Mach-Zehnder modulator.
14. The method according to claim 11 , wherein said series of diodes are integrated in a ring modulator.
15. The method according to claim 11 , wherein said series of diodes are connected in a distributed configuration.
16. The method according to claim 11 , wherein said integrated circuit communicates said amplified signals to said stacked inverters via transmission lines.
17. The method according to claim 16 , wherein said transmission lines are even-mode coupled.
18. The method according to claim 10 , comprising generating a voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.
19. A system for processing signals, the system comprising:
one or more circuits in an integrated circuit, said one or more circuits operable to:
generate a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier;
communicate the pair of signals to stacked CMOS inverters; and
amplify the pair of signals using said stacked CMOS inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said partial voltage domains is equal to a supply voltage of said integrated circuit.
20. The system according to claim 19 , wherein said one or more circuits generates a voltage domain boundary value of one half the supply voltage via symmetric stacked circuits.