Multi-cell modulation for flash memory

1. A method of storing a number of data values in a plurality of flash memory cells wherein each flash memory cell has a plurality of storage states and each data value is selected from a set of possible data values, the method comprising:

programming the number of data values to the plurality of flash memory cells using a mapping which uniquely associates each combination of storage states for the plurality of flash memory cells with a concatenated data value from a set of concatenated data values wherein:

the set of concatenated data values comprises a concatenated data value for every combination of possible data values for the number of data values;

the concatenated data value has a position for each data value in the number of data values; and

the mapping is such that:

between adjacent storage states all but one data values are identical; and

each position in the concatenated data value changes the data value it represents between the same storage states on each flash memory cell.

2. A method according to claim 1 wherein a number of concatenated data values in the set of concatenated data values equals the number of combinations of storage states for the plurality of flash memory cells.

3. A method according to claim 2 wherein, for a given flash memory cell, the number of times a position in the concatenated data value changes the data value it represents differs by at most 1 from the number of times any other position in the concatenated data value changes the data value it represents.

4. A method according to claim 3 wherein the data value represented by a position of the concatenated data value differs between adjacent storage states by at most one binary digit in a binary representation.

5. The method of claim 1 , further comprising:

determining, for each memory cell, which group of storage states each memory cell has been programmed to by reading the memory cell, wherein a group of storage states within a memory cell is associated with fewer than all possible storage states;

based on the mapping and on identified groups of storage states in all of the number of memory cells determining at least one data value from the concatenated data value; and

outputting the determined data value.

6. The method of claim 1 wherein each flash memory cell has eight storage states, a number of memory cells equals two, the number of data values equals two.

7. The method of claim 1 wherein each flash memory cell has eight storage states, a number of memory cells equals two, the number of data values equals three.

8. The method of claim 1 wherein each flash memory cell has sixteen storage states, a number of memory cells equals two, the number of data values equals two.

9. The method of claim 1 wherein each flash memory cell has sixteen storage states, a number of memory cells equals three, the number of data values equals three.

10. A device for storing a number of data values in a plurality of flash memory cells wherein each flash memory cell has a plurality of storage states and each data value is selected from a set of possible data values, the device comprising a processor and a memory storing instruction for execution by the processor, the instructions causing the processor when executing the instructions to:

program the number of data values to the plurality of flash memory cells using a mapping which uniquely associates each combination of storage states for the plurality of flash memory cells with a concatenated data value from a set of concatenated data values wherein:

the set of concatenated data values comprises a concatenated data value for every combination of possible data values for the number of data values;

the concatenated data value has a position for each data value in the number of data values; and

the mapping is such that:

between adjacent storage states all but one data values are identical; and

each position in the concatenated data value changes the data value it represents between the same storage states on each flash memory cell.

11. The device according to claim 10 , wherein a number of concatenated data values in the set of concatenated data values equals the number of combinations of storage states for the plurality of flash memory cells.

12. The device according to claim 11 wherein, for a given flash memory cell, the number of times a position in the concatenated data value changes the data value it represents differs by at most 1 from the number of times any other position in the concatenated data value changes the data value it represents.

13. The device according to claim 12 wherein the data value represented by a position of the concatenated data value differs between adjacent storage states by at most one binary digit in a binary representation.

14. The device according to claim 10 , wherein the instructions further cause the processor to:

determine, for each memory cell, which group of storage states each memory cell has been programmed to by reading the memory cell, wherein a group of storage states within a memory cell is associated with fewer than all possible storage states;

based on the mapping and on identified groups of storage states in all of the number of memory cells determine at least one data value from the concatenated data value; and

output the determined data value.

15. The device according to claim 10 wherein each flash memory cell memory cell has eight storage states, a number of memory cells equals two, the number of data values equals two.

16. The device according to claim 10 wherein each flash memory cell has eight storage states, a number of memory cells equals two, the number of data values equals three.

17. The device according to claim 10 wherein each flash memory cell has sixteen storage states, a number of memory cells equals two, the number of data values equals two.

18. The device according to claim 10 wherein each flash memory cell has sixteen storage states, a number of memory cells equals three, the number of data values equals three.

19. A flash memory comprising a plurality of flash memory cells and the device for storing a number of data values in a plurality of flash memory cells as claimed in claim 10 , the flash memory being configured to store data in the plurality of flash memory cells using the device.