IP Library Patent Application 16530357
Patent Application
App. No. 16/530,357

STORAGE SYSTEM WITH ERROR MITIGATION MECHANISM AND METHOD OF OPERATION THEREOF

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Quick Facts
Patent No.
US None
App. No.
16/530,357
Abstract

A storage system includes: a control processor, configured to: read user data with a read threshold, detect a correctable data error in the user data, adjust the read threshold to correct the correctable data error, read a 1 and 0 counter to determine which threshold adjustment range has been activated, generate an adjusted read threshold, based on the threshold adjustment range, to update an optimal read threshold set; and read the user data in a physical block using the adjusted read threshold.

Claims (39)

1 . A storage system comprising:

a control processor, configured to:

read user data with a read threshold,

detect a correctable data error in the user data,

adjust the read threshold to correct the correctable data error,

read a 1 and 0 counter to determine which threshold adjustment range has been activated,

generate an adjusted read threshold, based on the threshold adjustment range, to update an optimal read threshold set; and

read the user data in a physical block using the adjusted read threshold.

2 . The system as claimed in claim 1 wherein the control processor is further configured to interpret a residual count of 1's and 0's based on the values loaded in a range register.

3 . The system as claimed in claim 1 wherein the control processor is further configured to update the optimal read threshold set with the read threshold when the control processor detects a sector balanced.

4 . The system as claimed in claim 1 wherein the control processor is further configured to read the user data in the physical block using the adjusted read threshold from the optimal read threshold set.

5 . The system as claimed in claim 1 wherein the control processor is further configured to determine the adjusted read threshold by reading a shift left 1, a shift left 2, and a shift left 3, when the number of 0's is greater than the number of 1's.

6 . The system as claimed in claim 1 wherein the control processor is further configured to determine the adjusted read threshold by reading a shift right 1, a shift right 2, and a shift right 3, when the number of 0's is less than the number of 1's.

7 . The system as claimed in claim 1 wherein the control processor is configured to mitigate the correctable error when reading the physical block by using the adjusted read threshold.

8 . A method of operation of a storage system comprising:

reading user data from a non-volatile memory array using a read threshold;

detecting a correctable data error in the user data;

adjusting the read threshold to correct the correctable data error;

reading a 1 and 0 counter for determining which threshold adjustment range has been activated;

generating an adjusted read threshold, based on the threshold adjustment range, for updating an optimal read threshold set; and

reading the user data in a physical block using the adjusted read threshold.

9 . The method as claimed in claim 8 further comprising interpreting a residual count of 1's and 0's based on the values loaded in a range register.

10 . The method as claimed in claim 8 further comprising updating the optimal read threshold set with the read threshold when the control processor detects a sector balanced.

11 . The method as claimed in claim 8 further comprising reading the user data in the physical block using the adjusted read threshold from the optimal read threshold set.

12 . The method as claimed in claim 8 further comprising determining the adjusted read threshold by reading a shift left 1, a shift left 2, and a shift left 3, when the number of 0's is greater than the number of 1's.

13 . The method as claimed in claim 8 further comprising determining the adjusted read threshold by reading a shift right 1, a shift right 2, and a shift right 3, when the number of 0's is less than the number of 1's.

14 . The method as claimed in claim 8 further comprising mitigating the correctable error when reading the physical block by using the adjusted read threshold.

15 . A non-transitory computer readable medium including instructions for execution, the medium comprising:

reading user data from a non-volatile memory array using a read threshold;

detecting a correctable data error in the user data;

adjusting the read threshold to correct the correctable data error;

reading a 1 and 0 counter for determining which threshold adjustment range has been activated;

generating an adjusted read threshold, based on the threshold adjustment range, for updating an optimal read threshold set; and

reading the user data in a physical block using the adjusted read threshold.

16 . The medium as claimed in claim 15 further comprising interpreting a residual count of 1's and 0's based on the values loaded in a range register.

17 . The medium as claimed in claim 15 further comprising updating the optimal read threshold set with the read threshold when the control processor detects a sector balanced.

18 . The medium as claimed in claim 15 further comprising reading the user data in the physical block using the adjusted read threshold from the optimal read threshold set.

19 . The medium as claimed in claim 15 further comprising determining the adjusted read threshold by reading a shift left 1, a shift left 2, and a shift left 3, when the number of 0's is greater than the number of 1's.

20 . The medium as claimed in claim 15 further comprising determining the adjusted read threshold by reading a shift right 1, a shift right 2, and a shift right 3, when the number of 0's is less than the number of 1's.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2022
From: CNEX LABS, INC.
To: POINT FINANCIAL, INC.
Reel/Frame 058951/0738 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2019
From: TAO, JUN; CHENG, CHIH-CHIENG; LUO, SHANYING
To: CNEX LABS, INC.
Reel/Frame 049944/0194 →