IP Library Granted Patent US 10,915,479
Granted Patent B1
US 10,915,479 · App. 16/537,576 · Granted Feb 9, 2021

Hardware acceleration for uploading/downloading databases

Inventors: Lion Levi (Yavne, IL); Aviv Kfir (Nili, IL); Idan Matari (Lod, IL); Ran Shani (Hod Hasharon, IL); Zachy Haramaty (Hemed, IL); Nir Monovich (Hod Hasharon, IL); Matty Kadosh (Hadera, IL)
Assignee: MELLANOX TECHNOLOGIES TLV LTD.
G06F13/28G06F13/4022H04L45/306H04L49/9063
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Quick Facts
Patent No.
US 10,915,479
App. No.
16/537,576
Granted
Feb 9, 2021
Kind
B1
Abstract

A network element includes one or more ports for communicating over a network, a processor and packet processing hardware. The packet processing hardware is configured to transfer packets to and from the ports, and further includes data-transfer circuitry for data transfer with the processor. The processor and the data-transfer circuitry are configured to transfer between one another (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by (i) translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor, and (ii) using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases.

Claims (24)

1. A network element, comprising:

one or more ports for communicating over a network;

a processor; and

packet processing hardware, configured to transfer packets to and from the ports, the packet processing hardware further comprising data-transfer circuitry for data transfer with the processor,

wherein the processor and the data-transfer circuitry are configured to transfer between one another (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by:

translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor; and

using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases,

wherein the databases comprise one or more of (i) a configuration database that the processor sends to the packet processing hardware for configuring the packet processing hardware, and (ii) a hardware status database that the packet processing hardware sends to the processor.

2. The network element according to claim 1 , wherein the packet processing hardware comprises a shared queue for buffering data associated with both the communication packets and the databases.

3. The network element according to claim 1 , wherein the network element comprises a network switch, and wherein the packet processing hardware is configured to route the packets between the ports.

4. The network element according to claim 1 , wherein the network element comprises a network interface, and wherein the packet processing hardware is configured to forward the packets between the ports and a host system.

5. The network element according to claim 1 , wherein the packet processing hardware comprises separate queues for buffering data associated with the communication packets and for buffering data associated with the databases.

6. The network element according to claim 1 and wherein the hardware status database comprises one or more of the following: monitoring tables; queue length statistics; a control status dump; counter dump; packet sampling dump; and routing tables.

7. A communication method in a network element comprising one or more ports connected to a network, a processor and packet processing hardware, the method comprising:

transferring packets to and from the ports using the packet processing hardware; and

transferring, between the processor and data-transfer circuitry in the packet processing hardware, (i) one or more communication packets for transferal between the ports and the processor and (ii) one or more databases for transferal between the packet processing hardware and the processor, by:

translating, by the processor, the transferal of both the communication packets and the databases into work elements, and posting the work elements on one or more work queues in a memory of the processor; and

using the data-transfer circuitry, executing the work elements so as to transfer both the communication packets and the databases,

wherein transferring the databases comprises one or more of (i) transferring a configuration database from the processor to the packet processing hardware for configuring the packet processing hardware, and (ii) transferring a hardware status database from the packet processing hardware to the processor.

8. The method according to claim 7 , wherein transferring the communication packets and the databases comprises buffering data associated with both the communication packets and the databases in a shared queue in the packet processing hardware.

9. The method according to claim 7 , wherein the network element comprises a network switch, and wherein transferring the packets comprises routing the packets between the ports.

10. The method according to claim 7 , wherein the network element comprises a network interface, and wherein transferring the packets comprises forwarding the packets between the ports and a host system.

11. The method according to claim 7 , wherein transferring the communication packets and the databases comprises buffering data associated with the communication packets and data associated with the databases in separate queues in the packet processing hardware.

12. The method according to claim 7 and wherein the hardware status database comprises one or more of the following: monitoring tables; queue length statistics; a control status dump; counter dump; packet sampling dump; and routing tables.

Assignments (2)
MERGER Recorded Dec 15, 2021
From: MELLANOX TECHNOLOGIES TLV LTD.
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 058517/0564 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2019
From: LEVI, LION; KFIR, AVIV; MATARI, IDAN; SHANI, RAN; HARAMATY, ZACHY; MONOVICH, NIR; KADOSH, MATTY
To: MELLANOX TECHNOLOGIES TLV LTD.
Reel/Frame 050020/0325 →