IP Library Granted Patent US 10,818,231
Granted Patent B2
US 10,818,231 · App. 16/540,201 · Granted Oct 27, 2020

Pixel circuits including feedback capacitors and reset capacitors, and display systems therefore

Inventor: Gholamreza Chaji (Waterloo, CA)
Assignee: Ignis Innovation Inc.
G09G3/3233G09G3/3208G09G3/3258G09G3/3283G09G3/325G09G3/3291G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/061G09G2310/066
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Quick Facts
Patent No.
US 10,818,231
App. No.
16/540,201
Granted
Oct 27, 2020
Kind
B2
Abstract

A display with a pixel circuit for driving a current-driven emissive element includes a feedback capacitor in series between the emissive element and a programming node of the pixel circuit. During driving, variations in the operating voltage of the emissive element due to variations in the current conveyed through the emissive element by a driving transistor are accounted for. The feedback capacitor generates voltage adjustments at the programming node that correspond to the variations at the emissive element, and thus reduces variations in light emission. A reset capacitor connected to a select line is selectively connected to the gate terminal of the driving transistor and resets the driving transistor prior to programming. The select line adjusts the voltage on the gate terminal to reset the driving transistor by the capacitive coupling of the select line to the gate terminal created by the reset capacitor.

Claims (32)

1. A pixel circuit connectable to a data line and a reset line comprising:

a drive transistor including a gate terminal configured to convey a drive current through a light emitting device during emission cycles, the drive current being conveyed according to a voltage on the gate terminal of the drive transistor;

a storage capacitor connected to the gate terminal of the drive transistor for storing programming voltages conveyed via the data line during programming and/or compensation cycles;

a first switch transistor connected between the gate terminal of the drive transistor and a first terminal of the drive transistor between the drive transistor and the light emitting device;

a first select line connected to a gate terminal of the first switch transistor for conveying a signal to turn on the first switch transistor; and

a reset capacitor connected between the first terminal of the drive transistor and the reset line such that the reset line is capacitively coupled to the gate terminal of the drive transistor, while the first switch transistor is turned on, and configured to generate a change in voltage at the gate terminal of the drive transistor based on the storage and reset capacitors for resetting the drive transistor between programming cycles.

2. The pixel circuit according to claim 1 , wherein the first switch transistor is connected to the first select line such that turning on the first switch transistor by adjusting the voltage on the first select line simultaneously generates a change in voltage at the gate terminal of the drive transistor.

3. The pixel circuit according to claim 1 , further comprising an emission control transistor between the drive transistor and the light emitting device; wherein the emission control transistor is configured to turn off prior to programming the pixel circuit, such that the voltage of the light emitting device discharges to an off voltage.

4. The pixel circuit according to claim 1 , wherein a first terminal of the storage capacitor is connected to the gate terminal of the drive transistor, and a second terminal of the storage capacitor connected to a stable voltage to allow the storage capacitor to be charged according to programming information.

5. The pixel circuit according to claim 1 , wherein a first terminal of the storage capacitor is connected to the gate terminal of the drive transistor, and a second terminal of the storage capacitor is connected to a power supply line.

6. The pixel circuit according to claim 1 , wherein the light emitting device is an organic light emitting diode.

7. The pixel circuit according to claim 1 , wherein the drive transistor is an n-type or p-type thin film transistor.

8. The pixel circuit according to claim 1 , further comprising: a feedback capacitor connected between the light emitting device and the gate terminal of the drive transistor such that voltage change across the light emitting device generates a corresponding voltage change at the gate terminal of the drive transistor.

9. The pixel circuit according to claim 8 , wherein in response to an increase in the voltage at the light emitting device caused by an increase in current through the light emitting device, the feedback capacitor is configured to generate a corresponding voltage decrease at the gate terminal of the drive transistor to cause the current through the drive transistor to decrease.

10. The pixel circuit according to claim 8 , wherein in response to a decrease in the voltage at the light emitting device caused by a decrease in current through the light emitting device, the feedback capacitor is configured to generate a corresponding voltage increase at the gate terminal of the drive transistor to cause the current through the drive transistor to increase.

11. The pixel circuit according to claim 8 , wherein the voltage changes at the gate terminal of the drive transistor generated by the feedback capacitor are generated according to a voltage division relationship between the storage capacitor and the feedback capacitor.

12. The pixel circuit according to claim 1 , further comprising: a switching circuit connected to a second select line configured to selectively couple the gate terminal of the drive transistor to the data line for charging the storage capacitor and programming the pixel circuit according to programming information.

13. The pixel circuit according to claim 12 , wherein the switching circuit includes a second switch transistor connected to the second select line configured to selectively connect the gate terminal of the drive transistor to the data line.

14. The pixel circuit according to claim 13 , wherein the switching circuit further includes a programming capacitor; and wherein the second switch transistor is configured to selectively coupling the gate terminal of the drive transistor to the data line via the programming capacitor.

15. The pixel circuit according to claim 14 , wherein the gate terminal of the drive transistor is capacitively coupled to the data line via the programming capacitor, such that while the first switch transistor and the second switch transistor are turned on and a ramp voltage is applied to the data line, a conveyed current is conveyed through the programming capacitor and the second switch transistor, whereby the gate terminal of the drive transistor adjusts according to the conveyed current to account for aging degradations in the drive transistor.

16. A display system including:

a plurality of pixel circuits arranged in rows and/or columns, the plurality of pixel circuits connected to a data line and a reset line, each of the plurality of pixel circuits including:

a light emitting device for emitting light during emission cycles;

a drive transistor including a gate terminal configured to convey a drive current through the light emitting device during the emission cycles, the drive current being conveyed according to a voltage on the gate terminal of the drive transistor;

a first switch transistor connected between the gate terminal of the drive transistor and a first terminal of the drive transistor between the drive transistor and the light emitting device; and

a first select line connected to a gate terminal of the first switch transistor for conveying a signal to turn on the first switch transistor;

a common storage capacitor connected to the gate terminals of each of the drive transistors for storing programming voltages conveyed via the data line during programming and/or compensation cycles;

a common reset capacitor connected between the first terminals of each of the drive transistors and the reset line, such that the reset line is capacitively coupled to the gate terminals of each of the drive transistors, while the first switch transistors are turned on, and configured to generate a change in voltage at the gate terminals of each of the drive transistors based on the storage and reset capacitors for resetting each of the drive transistors between programming cycles.

17. The display according to claim 16 , further comprising: a feedback capacitor connected between the light emitting device and the gate terminal of the drive transistor such that voltage changes across the light emitting device generate corresponding voltage changes at the gate terminal of the drive transistor.

18. The display according to claim 16 , further comprising: a switching circuit connected to a second select line configured to selectively couple the gate terminal of the drive transistor to the data line for charging the storage capacitor and programming the pixel circuit according to programming information.

19. The display according to claim 18 , wherein the switching circuit includes a second switch transistor connected to the second select line configured to selectively connect the gate terminal of the drive transistor to the data line.

20. The display according to claim 19 , wherein the switching circuit further includes a programming capacitor; and wherein the second switch transistor is configured to selectively coupling the gate terminal of the drive transistor to the data line via the programming capacitor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2023
From: IGNIS INNOVATION INC.
To: IGNIS INNOVATION INC.
Reel/Frame 063706/0406 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2019
From: CHAJI, GHOLAMREZA
To: IGNIS INNOVATION INC.
Reel/Frame 050047/0234 →
Continuity (3)
Continuation 15661777 · Jul 27, 2017
Continuation 13470059 · May 11, 2012
Related Publication 20190371242A1 · Dec 5, 2019