IP Library Granted Patent US 11,575,364
Granted Patent B2
US 11,575,364 · App. 16/543,756 · Granted Feb 7, 2023

Apparatuses and methods for shifting a digital signal by a shift time to provide a shifted signal

Inventors: Thomas Bauernfeind (Arbing, AT); Andreas Menkhoff (Oberhaching, DE); Michael Bruennert (Unterhaching, DE)
Assignee: Apple Inc.
H03H17/0291H03H17/0018H03H17/0635H03F2200/336
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Quick Facts
Patent No.
US 11,575,364
App. No.
16/543,756
Granted
Feb 7, 2023
Kind
B2
Abstract

An apparatus for shifting a digital signal having a first sample rate by a shift time to provide a shifted signal having a second sample rate is provided. The apparatus includes a sample rate converter configured to provide a value of an interpolated signal at a compensated sample time as a sample of the shifted signal, the interpolated signal being based on the digital signal. The sample rate converter is configured to modify a time interval between a sample time of the digital signal and the compensated sample time based on the shift time.

Claims (7)

1. An apparatus for time-shifting a digital signal by a shift time while converting a sample rate of the digital signal, the apparatus comprising: a sample rate converter configured to evaluate an interpolation function determined based on input samples of the digital signal at a compensated sample time to generate output samples, wherein the input samples have a first sample rate and the output samples have a second sample rate, and the compensated sample time is determined based on a shift time between the output samples and the input samples; wherein the sample rate converter comprises: a nominal sample time calculation unit configured to determine a nominal sample time corresponding to the second sample rate; and an adder for adding or subtracting the shift time to or from the nominal sample time to obtain the compensated sample time; wherein the sample rate converter comprises a format conversion unit to match a format of the shift time and the nominal sample time.

2. A transmitter comprising: a first circuitry configured to process a digital signal at a first clock rate; a digital modulator configured to time-shift an output of the first circuitry by a shift time while converting a sample rate of the digital signal; and a second circuitry configured to process an output of the digital modulator at a second clock rate; wherein the digital modulator comprises: a sample rate converter configured to evaluate an interpolation function determined from input samples of the digital signal at a compensated sample time to generate output samples, wherein the input samples have a first sample rate and the output samples have a second sample rate, and the compensated sample time is determined based on a shift time between the output samples and the input samples.

3. The transmitter of claim 2 , wherein each of the first circuitry and the second circuitry includes a plurality of processing paths and the digital modulator is configured to adjust shift times on the plurality of processing paths to timely align outputs on the plurality of processing paths.

4. The transmitter of claim 3 wherein the plurality of processing paths include a processing path for a radius component of a transmit signal, a processing path for a phase component of the transmit signal, and/or a processing path for an envelope component of the transmit signal.

5. The transmitter of claim 2 wherein the first circuitry is a digital signal processor running on a digital signal processor clock domain and the second circuitry is a radio frequency (RF) circuitry running on an RF clock domain.

6. The transmitter of claim 2 , wherein the shift time is variable over time.

7. The transmitter of claim 2 , wherein the ratio of the first sample rate and the second sample rate is fractional.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053309/0140 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053051/0295 →