IP Library Granted Patent US 11,121,690
Granted Patent B2
US 11,121,690 · App. 16/552,843 · Granted Sep 14, 2021

Class D amplifier circuit

Inventors: John Paul Lesso (Edinburgh, GB); Toru Ido (Yokohama, JP)
Assignee: Cirrus Logic, Inc.
H03G3/3089H03F1/26H03F1/32H03F1/34H03F3/187H03F3/217H03F3/2175H03G7/002H03G7/007H03F3/2171H03F3/2173H03F2200/102H03F2200/339H03F2200/432
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Quick Facts
Patent No.
US 11,121,690
App. No.
16/552,843
Granted
Sep 14, 2021
Kind
B2
Abstract

This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block.

Claims (23)

1. A Class-D amplifier circuit for amplifying an input signal comprising:

a controller configured to control the Class-D amplifier circuit to selectively transition between an open-loop operational mode and a closed-loop operational mode based on indication of amplitude of said input signal;

a class-D output stage;

a modulator for generating at least one control signal for controlling switching of a said class-D output stage wherein the controller comprises a signal selector configured such that in the closed-loop operational mode an input to the modulator is based on the input signal combined with a feedback signal and in the open-loop operational mode the input to the modulator is based on the input signal with no contribution from the feedback signal; and

an error block for generating an error signal based on the input signal and the feedback signal wherein the signal selector is configured to select the error signal as the input to the modulator in the closed-loop operational mode.

2. The Class-D amplifier circuit as claimed in claim 1 , wherein the controller is configured to control the Class-D amplifier circuit in the open-loop operational mode if the indication of the amplitude of the digital input signal is below a first amplitude threshold and to control the Class-D amplifier circuit in the closed-loop operational mode if the indication of the amplitude of the digital input signal is above said first amplitude threshold.

3. The Class-D amplifier circuit as claimed in claim 1 , comprising a forward signal path configured to receive the input signal and a feedback path wherein the controller comprises the signal selector for controlling an extent to which a signal in the feedback path contributes to the forward signal path.

4. The Class-D amplifier circuit as claimed in claim 1 , wherein the error block comprises an analogue to digital converter coupled to receive the feedback signal and wherein said signal selector is configured to enable the analogue to digital converter in the closed-loop operational mode and disable the analogue to digital converter in the open-loop operational mode.

5. The Class-D amplifier circuit as claimed in claim 1 , comprising at least one variable gain element for applying a variable gain to the feedback signal or the error signal wherein the signal selector is a controller that is configured to control the at least one variable gain element to provide a first non-zero gain setting in the closed-loop operational mode and a second gain setting of zero in the open-loop operational mode.

6. The Class-D amplifier circuit as claimed in claim 5 , wherein said controller is configured to control the at least one variable gain element to provide a controlled transition in gain between said first and second gain settings that involves at least one intermediate gain setting.

7. The Class-D amplifier circuit as claimed in claim 6 , wherein said controlled transition in gain comprises a ramp in gain.

8. The Class-D amplifier circuit as claimed in claim 7 , wherein said at least one variable gain element comprises a loop filter having a variable gain.

9. The Class-D amplifier circuit as claimed in claim 8 , wherein the loop filter comprises an integrator and the controller is configured to control the integrator time constant of said integrator to vary the gain of the loop filter.

10. The Class-D amplifier circuit as claimed in claim 1 , further comprising an envelope detector for determining an envelope value for the input signal wherein signal selection controller is configured to use said envelope value as the indication of amplitude of the digital input signal.

11. The Class-D amplifier circuit as claimed in claim 10 , wherein the envelope detector is configured to apply a predetermined delay between any detected drop in signal amplitude and a reduction in the envelope value.

12. The Class-D amplifier circuit as claimed in claim 1 , wherein the controller is configured to initiate any transition between the open-loop operational mode and the closed-loop operational mode at a zero-crossing of the input signal.

13. The Class-D amplifier circuit as claimed in claim 12 , comprising a zero-crossing detector for detecting a zero-crossing of the input signal.

14. An electronic apparatus comprising a Class D amplifier circuit as claimed in claim 1 .

15. The electronic apparatus as claimed in claim 14 , wherein said electronic apparatus is at least one of: a portable device; a battery power device; a computing device; a communications device; a gaming device; a mobile telephone; a personal media player; a laptop, tablet or notebook computing device.

16. A Class-D amplifier circuit for amplifying an input signal comprising:

a controller configured to control the Class-D amplifier circuit to selectively transition between an open-loop operational mode and a closed-loop operational mode based on indication of amplitude of said input signal; and

an envelope detector for determining an envelope value of said input signal wherein the controller is configured to use said envelope value as the indication of amplitude of said input signal.

17. A Class-D amplifier circuit for amplifying an input signal comprising a controller configured to control the Class-D amplifier circuit to selectively transition between an open-loop operational mode and a closed-loop operational mode based on an indication of amplitude of said input signal, wherein the controller is configured to initiate any transition between the open-loop operational mode and the closed-loop operational mode at a zero-crossing of said input signal.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2021
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC, INC.
Reel/Frame 056798/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2019
From: LESSO, JOHN PAUL; IDO, TORU
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 050186/0256 →
Priority Claims (1)
GB 1415328 · Aug 29, 2014 · national
Continuity (4)
Continuation 15886103 · Feb 1, 2018
Continuation 15466661 · Mar 22, 2017
Continuation 14836006 · Aug 26, 2015
Related Publication 20190386626A1 · Dec 19, 2019
Cited By (3)
US 12,633,887 US 12,707,199 US 12,712,509