IP Library Granted Patent US 10,970,237
Granted Patent B2
US 10,970,237 · App. 16/561,154 · Granted Apr 6, 2021

Storage system

Inventors: Katsuya Tanaka (Tokyo, JP); Kentaro Shimada (Tokyo, JP)
Assignee: HITACHI, LTD.
G06F13/1668G06F12/0806G06F13/28G06F13/4022G06F13/4282G06F2212/304G06F2213/0026
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Quick Facts
Patent No.
US 10,970,237
App. No.
16/561,154
Granted
Apr 6, 2021
Kind
B2
Abstract

A first storage controller includes a first processor, a first memory, and a first switch having a first port. A second storage controller includes a second processor, a second memory, and a second switch having a second port. A storage system connects the first port and the second port by a first link. The first processor and the first switch are connected by a second link configured to transfer user data and a third link configured to transfer control data. The second processor and the second switch are connected by a fourth link configured to transfer user data and a fifth link configured to transfer control data. The first port and the second port transfer the control data in preference to the user data on the first link.

Claims (87)

1. A storage system comprising a first storage controller and a second storage controller, wherein

the first storage controller comprises:

a first processor;

a first memory connected to the first processor;

a first switch which is connected to the first processor and has a first port;

a cache memory area which is set in the first memory and stores user data; and

a shared memory area which is set in the first memory and stores control data,

the second storage controller comprises:

a second processor;

a second memory connected to the second processor;

a second switch which is connected to the second processor and has a second port;

a cache memory area which is set in the second memory and stores user data; and

a shared memory area which is set in the second memory and stores control data,

the storage system connects:

the first port and the second port by a first link;

the first processor and the first switch by a second link configured to transfer the user data and a third link configured to transfer the control data; and

the second processor and the second switch by a fourth link configured to transfer the user data and a fifth link configured to transfer the control data, and

the first port and the second port transfer the control data in preference to the user data on the first link

wherein

the first link, the second link, and the fourth link are connected to a non transparent bridge included in the first switch or the second switch, and

the third link and the fifth link are connected to an upstream port of the first switch or the second switch.

2. The storage system according to claim 1 , wherein

the first link includes a plurality of virtual channels,

the user data and the control data are transferred in the virtual channels different from each other on the first link, and

the first port and the second port transfer the control data to be transferred in the virtual channel in preference to the user data.

3. The storage system according to claim 2 , wherein

a DMA controller built in the first switch or a DMA controller built in the second switch transfers the control data on the first link in a packet set to a higher transfer priority than a packet to transfer the user data.

4. The storage system according to claim 2 , wherein

the first switch or the second switch translates a transfer priority of a packet to transfer the control data into a transfer priority higher than a transfer priority of a packet to transfer the user data, and transmits the control data to the first link.

5. The storage system according to claim 2 , wherein

the first switch includes a first virtual switch and a second virtual switch, the first virtual switch and the second virtual switch connected by a first non transparent bridge,

the second switch includes a third virtual switch and a fourth virtual switch, the third virtual switch and the fourth virtual switch connected by a second non transparent bridge,

the second link is connected to an upstream port of the first virtual switch,

the third link is connected to an upstream port of the second virtual switch,

the fourth link is connected to an upstream port of the third virtual switch,

the fifth link is connected to an upstream port of the fourth virtual switch,

the second virtual switch includes the first port, and

the fourth virtual switch includes the second port.

6. The storage system according to claim 5 , wherein

the first virtual switch or the third virtual switch connects a frontend interface or a solid state drive.

7. A storage system comprising a first storage controller and a second storage controller, wherein

the first storage controller comprises:

a first processor;

a first memory connected to the first processor;

a first switch which is connected to the first processor and has a first port;

a cache memory area which is set in the first memory and stores user data; and

a shared memory area which is set in the first memory and stores control data,

the second storage controller comprises:

a second processor;

a second memory connected to the second processor;

a second switch which is connected to the second processor and has a second port;

a cache memory area which is set in the second memory and stores user data; and

a shared memory area which is set in the second memory and stores control data,

the storage system connects:

the first port and the second port by a first link;

the first processor and the first switch by a second link configured to transfer the user data and a third link configured to transfer the control data; and

the second processor and the second switch by a fourth link configured to transfer the user data and a fifth link configured to transfer the control data, and

the first port and the second port transfer the control data in preference to the user data on the first link,

wherein

the first processor and the second processor have a DMA controller built in the first processor and a DMA controller built in the second processor, respectively,

the first switch and the second switch have a DMA controller built in the first switch and a DMA controller built in the second switch, respectively, and

between the first storage controller and the second storage controller, the DMA controller built in the first processor or the DMA controller built in the second processor transfers the user data, and the DMA controller built in the first switch or the DMA controller built in the second switch transfers control data.

8. The storage system according to claim 7 , wherein

the first storage controller or the second storage controller causes the DMA controller built in the first switch or the DMA controller built in the second switch to transfer the control data when a size of the control data to be transferred is a predetermined value or larger, and causes the first processor or the second processor to execute a memory write command and transfer the control data when the size of the control data to be transferred is smaller than the predetermined value.

9. A storage system comprising a first storage controller and a second storage controller,

wherein the first storage controller comprises:

a first processor;

a first memory connected to the first processor;

a first switch which is connected to the first processor and has a first external connection port;

a cache memory area which is set in the first memory and stores user data; and

a shared memory area which is set in the first memory and stores control data,

the second storage controller comprises:

a second processor;

a second memory connected to the second processor;

a second switch which is connected to the second processor and has a second external connection port;

a cache memory area which is set in the second memory and stores user data; and

a shared memory area which is set in the second memory and stores control data,

the storage system connects:

the first port and the second port by a first link;

the first processor and the first switch by a second link configured to transfer the user data and a third link configured to transfer the control data; and

the second processor and the second switch by a fourth link configured to transfer the user data and a fifth link configured to transfer the control data,

the first external connection port and the second external connection port include a plurality of virtual channels,

the first external connection port and the second external connection port are connected to an external switch including a plurality of virtual channels, and

the first external connection port and the second external connection port transfer the user data and the control data in the virtual channels different from each other

wherein

the first link, the second link, and the fourth link are connected to a non transparent bridge included in the first switch or the second switch, and

the third link and the fifth link are connected to an upstream port of the first switch or the second switch.

Assignments (2)
COMPANY SPLIT Recorded Aug 20, 2024
From: HITACHI, LTD.
To: HITACHI VANTARA, LTD.
Reel/Frame 069518/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2019
From: TANAKA, KATSUYA; SHIMADA, KENTARO
To: HITACHI, LTD.
Reel/Frame 050276/0544 →
Priority Claims (1)
JP JP2019-004734 · Jan 15, 2019 · national
Continuity (1)
Related Publication 20200226078A1 · Jul 16, 2020