Sector antenna systems and methods for providing high gain and high side-lobe rejection
Sector antenna arrays and methods of use that provide high main-lobe gain and high side-lobe rejection over a wide range of operating frequencies are provided herein. The example sector antennas provide these outstanding performance and reliability features due to (1) a cross-section profile for the ground plane, (2) a corporate feed for the linear array of patch antennas, and (3) an optimized sub-assembly of parasitic elements for high bandwidth operation with low return-loss.
1. A sector antenna system, comprising:
a linear antenna array for the sector antenna, configured to implement slant 45-degree polarizations, to exploit beamforming gain, the linear antenna array comprising a plurality of patch antenna elements that are connected through a corporate feed, the linear antenna array located on a printed circuit board (PCB) of the sector antenna, each of the plurality of patch antenna elements having bi-level parasitic patch element assemblies of varying diameter discs, for high bandwidth operation with low return-loss, the PCB having two layers comprising the corporate feed and a ground plane, the two layers separated by a dielectric substrate, with chokes disposed on opposing sides of the PCB for high side-lobe rejection, the chokes coupled to surfaces that extend upwardly and away from a lower linear surface of the ground plane, the ground plane comprising a channel that receives the PCB; and
the ground plane having a cross-section profile configured in such a way as to support the linear antenna array and the PCB, in order to increase main-lobe gain and side-lobe rejection.
2. The sector antenna system of claim 1 , wherein a deviation from the cross-section profile for the ground plane degrades antenna performance of the sector antenna.
3. The sector antenna system of claim 1 , wherein the linear antenna array is for a two-port sector antenna having nine patch antenna elements and nine corresponding bi-level parasitic patch element assemblies.
4. The sector antenna system of claim 1 , wherein the linear antenna array is for a four-port sector antenna having seventeen patch antenna elements and seventeen corresponding bi-level parasitic patch element assemblies.
5. The sector antenna system of claim 1 , wherein each of the plurality of bi-level parasitic patch assemblies are assembled at each patch antenna element, and electrically shorted to each patch antenna element, to improve beamwidth and bandwidth performance.
6. The sector antenna system of claim 1 , wherein each of the plurality of patch antenna elements has a bi-level parasitic patch assembly comprising two discs having varying diameters, optimally spaced for antenna performance.
7. The sector antenna system of claim 1 , further comprising a polymeric radome to provide a low loss mechanical housing for the sector antenna.
8. The sector antenna system of claim 7 , wherein the polymeric radome comprises metal or metalized end caps which are designed to be set at a prescribed angle.
9. The sector antenna system of claim 8 , wherein the metal or metalized end caps of the polymeric radome is adapted to be tilted at a prescribed angle of approximately 20 degrees to address any interfering side lobes of the sector antenna.
10. The sector antenna system of claim 1 , wherein the PCB and parasitic patch assemblies are mounted on a base of a metal or metalized structure, the structure having a prescribed geometry such as to enhance antenna performance, improve side-lobe rejection and improve front to back ratio.
11. The sector antenna system of claim 10 , wherein the structure is configured geometrically such that the front to back ratio of the sector antenna is equal to or greater than 43 dB.
12. A sector antenna system, comprising:
a linear antenna array for the sector antenna, configured to implement slant 45-degree polarizations, to exploit beamforming gain, the linear antenna array comprising a plurality of patch antenna elements that are connected through a corporate feed, the linear antenna array located on a printed circuit board (PCB) of the sector antenna, each of the plurality of patch antenna elements having parasitic patch element assemblies, the PCB having two layers comprising the corporate feed and a ground plane, the two layers being separated by a dielectric substrate, with chokes disposed on opposing sides of the PCB for high side-lobe rejection, the PCB being placed on a lower linear surface of the ground plane, each of the chokes coupled to an arcuate surface that extends above and away from the lower linear surface; and
the ground plane having a cross-section profile configured in such a way as to support the linear antenna array on the PCB, in order to increase main-lobe gain and side-lobe rejection.
13. A linear array for a sector antenna, comprising: a plurality of patch antenna elements that are connected through a corporate feed and are arranged for high antenna gain, the linear array located on a printed circuit board (PCB) of the sector antenna, each of the plurality of patch antenna elements having parasitic patch element assemblies, the PCB having two layers comprising the corporate feed and a ground plane, the two layers being separated by a dielectric substrate, with chokes disposed on opposing sides of the PCB for high side-lobe rejection, each of the chokes coupled to an arcuate surface that extends above and away from a lower linear surface of the ground plane.
14. The linear array of claim 13 , wherein the linear array is for a two-port sector antenna having nine patch antenna elements and nine corresponding bi-level parasitic patch element assemblies.
15. The linear array of claim 13 , wherein the linear array is for a four-port sector antenna having seventeen patch antenna elements and seventeen corresponding bi-level parasitic patch element assemblies.
16. The linear array of claim 13 , wherein each of the plurality of parasitic patch assemblies are assembled at each patch element, and electrically shorted to each patch element, to improve the beamwidth and bandwidth performance.
17. The linear array of claim 13 , wherein each of the plurality of patch antenna elements has a bi-level parasitic patch assembly comprising two discs having varying diameters, optimally spaced for antenna performance.
18. The linear array of claim 13 , further comprising a structural member that extends above the arcuate surface.
19. The linear array of claim 18 , wherein the structural member is a hollow triangular object that extends along a length of the ground plane, wherein a lower edge of the hollow triangular object is defined by the arcuate surface.
20. The linear array of claim 13 , wherein the PCB and parasitic patch assemblies are mounted on a base of a metal or metalized structure, the structure having a prescribed geometry such as to enhance antenna performance, improve side-lobe rejection and improve front to back ratio.