IP Library Granted Patent US 10,964,632
Granted Patent B2
US 10,964,632 · App. 16/564,083 · Granted Mar 30, 2021

Semiconductor device

Inventors: Takeshi Fujimori (Chigasaki, JP); Soichiro Ibaraki (Kawasaki, JP); Shinji Yamashita (Yokohama, JP)
Assignee: Toshiba Memory Corporation
H01L23/49811H01L23/556H01L27/11517
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Quick Facts
Patent No.
US 10,964,632
App. No.
16/564,083
Granted
Mar 30, 2021
Kind
B2
Abstract

According to one embodiment, there is provided a semiconductor device including a substrate, a semiconductor chip, and a conductive film. The substrate has a main face. The semiconductor chip has a surface equipped with an SRAM circuit. The semiconductor chip is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face. The conductive film is disposed on the main face or the surface. The conductive film extends planarly between the plurality of bump electrodes. A region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face.

Claims (57)

1. A semiconductor device comprising:

a substrate having a main face;

a semiconductor chip that has a surface including a static random access memory (SRAM) circuit and that is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face;

a conductive film that is disposed on the main face or the surface and that extends planarly between the plurality of bump electrodes; and

a second semiconductor chip that is mounted on a plurality of electrode patterns disposed on the main face via a plurality of bonding wires,

wherein a region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face, and

the conductive film encloses the bump electrodes with being apart from the bump electrodes and encloses the electrode patterns with being apart from the electrode patterns, in plan view.

2. The semiconductor device according to claim 1 ,

wherein the region has an area substantially equal to an area of the SRAM circuit.

3. The semiconductor device according to claim 1 ,

wherein the region has an area substantially equal to an area of the semiconductor chip.

4. The semiconductor device according to claim 1 ,

wherein the region is an entire area of the main face.

5. The semiconductor device according to claim 1 ,

wherein the conductive film covers the main face.

6. The semiconductor device according to claim 1 ,

wherein the conductive film covers the surface.

7. The semiconductor device according to claim 1 ,

wherein the conductive film is embedded in the main face.

8. The semiconductor device according to claim 1 ,

wherein the conductive film is electrically insulated from the bump electrodes.

9. The semiconductor device according to claim 1 ,

wherein the conductive film is in a potentially floating state.

10. The semiconductor device according to claim 1 ,

wherein the conductive film is electrically connected with a ground potential.

11. The semiconductor device according to claim 1 ,

wherein the substrate contains a radioactive substance.

12. The semiconductor device according to claim 1 ,

wherein the substrate is an organic substrate.

13. A semiconductor device comprising:

a substrate having a main face;

a semiconductor chip that has a surface including a static random access memory (SRAM) circuit and that is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face;

a conductive film that is disposed on the main face or the surface and that extends planarly between the plurality of bump electrodes; and

a second semiconductor chip that is mounted on the semiconductor chip with a spacer structure on the main face,

wherein a region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face,

the second semiconductor chip is mounted on a plurality of electrode patterns disposed on the main face via a plurality of bonding wires, and

the conductive film encloses the bump electrodes with being apart from the bump electrodes and electrode patterns with being apart from the electrode patterns, in plan view.

14. The semiconductor device according to claim 13 ,

wherein the region has an area substantially equal to an area of the SRAM circuit.

15. The semiconductor device according to claim 13 ,

wherein the conductive film is embedded in the main face.

16. The semiconductor device according to claim 13 ,

wherein the substrate contains a radioactive substance.

17. A semiconductor device comprising:

a substrate having a main face;

a semiconductor chip that has a surface including a static random access memory (SRAM) circuit and that is mounted on the main face via a plurality of bump electrodes in a state where the surface faces the main face;

a conductive film that is disposed on the main face or the surface and that extends planarly between the plurality of bump electrodes; and

a second semiconductor chip that is mounted on the semiconductor chip with a side-by-side structure on the main face,

wherein a region in the main face or the surface where the conductive film is disposed overlaps the SRAM circuit in a direction perpendicular to the main face,

the second semiconductor chip is mounted on a plurality of electrode patterns disposed on the main face via a plurality of bonding wires, and

the conductive film encloses the bump electrodes with being apart from the bump electrodes and electrode patterns with being apart from the electrode patterns, in plan view.

18. The semiconductor device according to claim 17 ,

wherein the region has an area substantially equal to an area of the SRAM circuit.

19. The semiconductor device according to claim 17 ,

wherein the conductive film is embedded in the main face.

20. The semiconductor device according to claim 17 ,

wherein the substrate contains a radioactive substance.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2020
From: FUJIMORI, TAKESHI; IBARAKI, SOICHIRO; YAMASHITA, SHINJI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051813/0328 →
Priority Claims (1)
JP JP2019-052914 · Mar 20, 2019 · national
Continuity (1)
Related Publication 20200303290A1 · Sep 24, 2020